From 737ec6ffe232dd0ca0fb6237cfe4f039c382ecc8 Mon Sep 17 00:00:00 2001 From: luckfox-eng29 Date: Mon, 18 Nov 2024 20:55:47 +0800 Subject: [PATCH] sysdrv:tools:board:kernel:Disable NPU overclocking by default to avoid memory errors caused by prolonged NPU operation. Signed-off-by: luckfox-eng29 --- .../board/kernel/rv1106g-luckfox-pico-max.dts | 38 +++++++++---------- .../kernel/rv1106g-luckfox-pico-ultra-w.dts | 38 +++++++++---------- .../kernel/rv1106g-luckfox-pico-ultra.dts | 38 +++++++++---------- 3 files changed, 57 insertions(+), 57 deletions(-) diff --git a/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-max.dts b/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-max.dts index 147411858..b72aebb01 100755 --- a/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-max.dts +++ b/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-max.dts @@ -15,27 +15,27 @@ }; /**********CRU**********/ -&cru { - assigned-clocks = - <&cru PLL_GPLL>, <&cru PLL_CPLL>, - <&cru ARMCLK>, - <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>, - <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>, - <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>, - <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>; - assigned-clock-rates = - <1188000000>, <700000000>, - <1104000000>, - <400000000>, <200000000>, - <100000000>, <300000000>, - <100000000>, <100000000>, - <200000000>, <700000000>; -}; +//&cru { +// assigned-clocks = +// <&cru PLL_GPLL>, <&cru PLL_CPLL>, +// <&cru ARMCLK>, +// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>, +// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>, +// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>, +// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>; +// assigned-clock-rates = +// <1188000000>, <700000000>, +// <1104000000>, +// <400000000>, <200000000>, +// <100000000>, <300000000>, +// <100000000>, <100000000>, +// <200000000>, <700000000>; +//}; /**********NPU**********/ -&npu { - assigned-clock-rates = <700000000>; -}; +//&npu { +// assigned-clock-rates = <700000000>; +//}; /**********FLASH**********/ &sfc { diff --git a/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-ultra-w.dts b/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-ultra-w.dts index d908c2930..a28d24fbd 100755 --- a/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-ultra-w.dts +++ b/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-ultra-w.dts @@ -36,27 +36,27 @@ }; /**********CRU**********/ -&cru { - assigned-clocks = - <&cru PLL_GPLL>, <&cru PLL_CPLL>, - <&cru ARMCLK>, - <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>, - <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>, - <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>, - <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>; - assigned-clock-rates = - <1188000000>, <700000000>, - <1104000000>, - <400000000>, <200000000>, - <100000000>, <300000000>, - <100000000>, <100000000>, - <200000000>, <700000000>; -}; +//&cru { +// assigned-clocks = +// <&cru PLL_GPLL>, <&cru PLL_CPLL>, +// <&cru ARMCLK>, +// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>, +// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>, +// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>, +// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>; +// assigned-clock-rates = +// <1188000000>, <700000000>, +// <1104000000>, +// <400000000>, <200000000>, +// <100000000>, <300000000>, +// <100000000>, <100000000>, +// <200000000>, <700000000>; +//}; /**********NPU**********/ -&npu { - assigned-clock-rates = <700000000>; -}; +//&npu { +// assigned-clock-rates = <700000000>; +//}; /**********EMMC**********/ &emmc { diff --git a/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-ultra.dts b/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-ultra.dts index a1a79596f..1fe8efacf 100755 --- a/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-ultra.dts +++ b/sysdrv/tools/board/kernel/rv1106g-luckfox-pico-ultra.dts @@ -15,27 +15,27 @@ }; /**********CRU**********/ -&cru { - assigned-clocks = - <&cru PLL_GPLL>, <&cru PLL_CPLL>, - <&cru ARMCLK>, - <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>, - <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>, - <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>, - <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>; - assigned-clock-rates = - <1188000000>, <700000000>, - <1104000000>, - <400000000>, <200000000>, - <100000000>, <300000000>, - <100000000>, <100000000>, - <200000000>, <700000000>; -}; +//&cru { +// assigned-clocks = +// <&cru PLL_GPLL>, <&cru PLL_CPLL>, +// <&cru ARMCLK>, +// <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>, +// <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>, +// <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>, +// <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>; +// assigned-clock-rates = +// <1188000000>, <700000000>, +// <1104000000>, +// <400000000>, <200000000>, +// <100000000>, <300000000>, +// <100000000>, <100000000>, +// <200000000>, <700000000>; +//}; /**********NPU**********/ -&npu { - assigned-clock-rates = <700000000>; -}; +//&npu { +// assigned-clock-rates = <700000000>; +//}; /**********EMMC**********/ &emmc {