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feat: add luckfox pico mini a/b support (#14)

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* fix:wifi_app mistake

* feat: add luckfox pico mini a/b support

Signed-off-by: eng33 <eng33@luckfox.com>

* Modified: Change the board name luckfox_pico_max to luckfox_pico__pro_max

Signed-off-by: eng33 <eng33@luckfox.com>

---------

Signed-off-by: eng33 <eng33@luckfox.com>
This commit is contained in:
luckfox-eng33 2023-10-28 16:06:02 +08:00 committed by GitHub
parent 395d161f40
commit f840ab9fe6
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GPG Key ID: 4AEE18F83AFDEB23
8 changed files with 787 additions and 2 deletions
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77
project/cfg/BoardConfig_IPC/BoardConfig-EMMC-NONE-RV1103_Luckfox_Pico_Mini_A-IPC.mk Executable file
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#!/bin/bash
# Target arch
export RK_ARCH=arm
# Target CHIP
export RK_CHIP=rv1106
# Target Toolchain Cross Compile
export RK_TOOLCHAIN_CROSS=arm-rockchip830-linux-uclibcgnueabihf
# Target boot medium: emmc/spi_nor/spi_nand
export RK_BOOT_MEDIUM=emmc
# Uboot defconfig
export RK_UBOOT_DEFCONFIG=rv1106_defconfig
# Uboot defconfig fragment
export RK_UBOOT_DEFCONFIG_FRAGMENT=rk-emmc.config
# Kernel defconfig
export RK_KERNEL_DEFCONFIG=luckfox_rv1106_linux_defconfig
# Kernel dts
export RK_KERNEL_DTS=rv1103g-luckfox-pico-mini-b.dts
#misc image
export RK_MISC=wipe_all-misc.img
# Config sensor IQ files
# RK_CAMERA_SENSOR_IQFILES format:
# "iqfile1 iqfile2 iqfile3 ..."
# ./build.sh media and copy <SDK root dir>/output/out/media_out/isp_iqfiles/$RK_CAMERA_SENSOR_IQFILES
export RK_CAMERA_SENSOR_IQFILES="sc4336_OT01_40IRC_F16.json sc3336_CMK-OT2119-PC1_30IRC-F16.json"
# Config sensor lens CAC calibrattion bin file
export RK_CAMERA_SENSOR_CAC_BIN="CAC_sc4336_OT01_40IRC_F16"
# Config CMA size in environment
export RK_BOOTARGS_CMA_SIZE="24M"
# config partition in environment
# RK_PARTITION_CMD_IN_ENV format:
# <partdef>[,<partdef>]
# <partdef> := <size>[@<offset>](part-name)
# Note:
# If the first partition offset is not 0x0, it must be added. Otherwise, it needn't adding.
export RK_PARTITION_CMD_IN_ENV="32K(env),512K@32K(idblock),256K(uboot),32M(boot),2G(rootfs),1G(oem),2G(userdata),-(media)"
# config partition's filesystem type (squashfs is readonly)
# emmc: squashfs/ext4
# nand: squashfs/ubifs
# spi nor: squashfs/jffs2
# RK_PARTITION_FS_TYPE_CFG format:
# AAAA:/BBBB/CCCC@ext4
# AAAA ----------> partition name
# /BBBB/CCCC ----> partition mount point
# ext4 ----------> partition filesystem type
export RK_PARTITION_FS_TYPE_CFG=rootfs@IGNORE@ext4,userdata@/userdata@ext4,oem@/oem@ext4
# config filesystem compress (Just for squashfs or ubifs)
# squashfs: lz4/lzo/lzma/xz/gzip, default xz
# ubifs: lzo/zlib, default lzo
# export RK_SQUASHFS_COMP=xz
# export RK_UBIFS_COMP=lzo
# app config
export RK_APP_TYPE=RKIPC_RV1103
# build ipc web backend
# export RK_APP_IPCWEB_BACKEND=y
# enable install app to oem partition
export RK_BUILD_APP_TO_OEM_PARTITION=y
# enable rockchip test
export RK_ENABLE_ROCKCHIP_TEST=y

84
project/cfg/BoardConfig_IPC/BoardConfig-SPI_NAND-NONE-RV1103_Luckfox_Pico_Mini_B-IPC.mk Executable file
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#!/bin/bash
# Target arch
export RK_ARCH=arm
# Target CHIP
export RK_CHIP=rv1106
# Target Toolchain Cross Compile
export RK_TOOLCHAIN_CROSS=arm-rockchip830-linux-uclibcgnueabihf
# Target boot medium: emmc/spi_nor/spi_nand
export RK_BOOT_MEDIUM=spi_nand
# Uboot defconfig
export RK_UBOOT_DEFCONFIG=rv1106_defconfig
# Uboot defconfig fragment
export RK_UBOOT_DEFCONFIG_FRAGMENT=rk-sfc.config
# Kernel defconfig
export RK_KERNEL_DEFCONFIG=luckfox_rv1106_linux_defconfig
# Kernel dts
export RK_KERNEL_DTS=rv1103g-luckfox-pico-mini-b.dts
#misc image
export RK_MISC=wipe_all-misc.img
# Config sensor IQ files
# RK_CAMERA_SENSOR_IQFILES format:
# "iqfile1 iqfile2 iqfile3 ..."
# ./build.sh media and copy <SDK root dir>/output/out/media_out/isp_iqfiles/$RK_CAMERA_SENSOR_IQFILES
export RK_CAMERA_SENSOR_IQFILES="sc4336_OT01_40IRC_F16.json sc3336_CMK-OT2119-PC1_30IRC-F16.json"
#export RK_CAMERA_SENSOR_IQFILES="sc4336_OT01_40IRC_F16.json sc3336_CMK-OT2119-PC1_30IRC-F16.json sc530ai_CMK-OT2115-PC1_30IRC-F16.json"
# Config sensor lens CAC calibrattion bin files
export RK_CAMERA_SENSOR_CAC_BIN="CAC_sc4336_OT01_40IRC_F16"
#export RK_CAMERA_SENSOR_CAC_BIN="CAC_sc4336_OT01_40IRC_F16 CAC_sc530ai_CMK-OT2115-PC1_30IRC-F16"
# Config CMA size in environment
export RK_BOOTARGS_CMA_SIZE="24M"
#export RK_BOOTARGS_CMA_SIZE="66M"
# config partition in environment
# RK_PARTITION_CMD_IN_ENV format:
# <partdef>[,<partdef>]
# <partdef> := <size>[@<offset>](part-name)
# Note:
# If the first partition offset is not 0x0, it must be added. Otherwise, it needn't adding.
export RK_PARTITION_CMD_IN_ENV="256K(env),256K@256K(idblock),512K(uboot),4M(boot),32M(rootfs),48M(oem),32M(userdata)"
#export RK_PARTITION_CMD_IN_ENV="256K(env),256K@256K(idblock),256K(uboot),8M(boot),32M(rootfs),48M(oem),32M(userdata),-(media)"
# config partition's filesystem type (squashfs is readonly)
# emmc: squashfs/ext4
# nand: squashfs/ubifs
# spi nor: squashfs/jffs2
# RK_PARTITION_FS_TYPE_CFG format:
# AAAA:/BBBB/CCCC@ext4
# AAAA ----------> partition name
# /BBBB/CCCC ----> partition mount point
# ext4 ----------> partition filesystem type
#export RK_PARTITION_FS_TYPE_CFG=rootfs@IGNORE@squashfs,oem@/oem@squashfs,userdata@/userdata@ubifs
export RK_PARTITION_FS_TYPE_CFG=rootfs@IGNORE@ubifs,oem@/oem@ubifs,userdata@/userdata@ubifs
# config filesystem compress (Just for squashfs or ubifs)
# squashfs: lz4/lzo/lzma/xz/gzip, default xz
# ubifs: lzo/zlib, default lzo
# export RK_SQUASHFS_COMP=xz
# export RK_UBIFS_COMP=lzo
# app config
export RK_APP_TYPE=RKIPC_RV1103
# export RK_APP_TYPE=RKIPC_RV1106
# build ipc web backend
# export RK_APP_IPCWEB_BACKEND=y
# enable install app to oem partition
export RK_BUILD_APP_TO_OEM_PARTITION=y
# enable rockchip test
export RK_ENABLE_ROCKCHIP_TEST=y

2
project/cfg/BoardConfig_IPC/BoardConfig-SPI_NAND-NONE-RV1106_Luckfox_Pico_Max-IPC.mk → project/cfg/BoardConfig_IPC/BoardConfig-SPI_NAND-NONE-RV1106_Luckfox_Pico_Pro_Max-IPC.mk
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@ -22,7 +22,7 @@ export RK_UBOOT_DEFCONFIG_FRAGMENT=rk-sfc.config
export RK_KERNEL_DEFCONFIG=luckfox_rv1106_linux_defconfig
# Kernel dts
export RK_KERNEL_DTS=rv1106g-luckfox-pico-max.dts
export RK_KERNEL_DTS=rv1106g-luckfox-pico-pro-max.dts
#misc image
export RK_MISC=wipe_all-misc.img

305
sysdrv/source/kernel/arch/arm/boot/dts/rv1103-luckfox-pico-mini-ipc.dtsi Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
*/
#include "rv1106-amp.dtsi"
/ {
chosen {
bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
};
acodec_sound: acodec-sound {
compatible = "simple-audio-card";
simple-audio-card,name = "rv-acodec";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
simple-audio-card,codec {
sound-dai = <&acodec>;
};
};
vcc_1v8: vcc-1v8 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcc_3v3: vcc-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vdd_arm: vdd-arm {
compatible = "regulator-fixed";
regulator-name = "vdd_arm";
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-always-on;
regulator-boot-on;
};
leds: leds {
compatible = "gpio-leds";
work_led: work{
gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "activity";
default-state = "on";
};
};
};
&acodec {
#sound-dai-cells = <0>;
pa-ctl-gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_arm>;
};
&csi2_dphy_hw {
status = "okay";
};
&csi2_dphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_input0: endpoint@0 {
reg = <0>;
remote-endpoint = <&sc3336_out>;
data-lanes = <1 2>;
};
csi_dphy_input1: endpoint@1 {
reg = <1>;
remote-endpoint = <&sc4336_out>;
data-lanes = <1 2>;
};
csi_dphy_input2: endpoint@2 {
reg = <2>;
remote-endpoint = <&sc530ai_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_csi2_input>;
};
};
};
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4m2_xfer>;
sc3336: sc3336@30 {
compatible = "smartsens,sc3336";
status = "okay";
reg = <0x30>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2119-PC1";
rockchip,camera-module-lens-name = "30IRC-F16";
port {
sc3336_out: endpoint {
remote-endpoint = <&csi_dphy_input0>;
data-lanes = <1 2>;
};
};
};
sc4336: sc4336@30 {
compatible = "smartsens,sc4336";
status = "okay";
reg = <0x30>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "OT01";
rockchip,camera-module-lens-name = "40IRC_F16";
port {
sc4336_out: endpoint {
remote-endpoint = <&csi_dphy_input1>;
data-lanes = <1 2>;
};
};
};
sc530ai: sc530ai@30 {
compatible = "smartsens,sc530ai";
status = "okay";
reg = <0x30>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
pwdn-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "CMK-OT2115-PC1";
rockchip,camera-module-lens-name = "30IRC-F16";
port {
sc530ai_out: endpoint {
remote-endpoint = <&csi_dphy_input2>;
data-lanes = <1 2>;
};
};
};
};
&i2s0_8ch {
#sound-dai-cells = <0>;
status = "okay";
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csi_dphy_output>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in>;
};
};
};
};
//&pwm0 {
// status = "okay";
//};
&rkcif {
status = "okay";
};
&rkcif_mipi_lvds {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mipi_pins>;
port {
/* MIPI CSI-2 endpoint */
cif_mipi_in: endpoint {
remote-endpoint = <&mipi_csi2_output>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp_in>;
};
};
};
&rkisp {
status = "okay";
};
&rkisp_vir0 {
status = "okay";
port@0 {
isp_in: endpoint {
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};
&saradc {
status = "okay";
vref-supply = <&vcc_1v8>;
};
//&sfc {
// status = "okay";
// flash@0 {
// compatible = "spi-nand";
// reg = <0>;
// spi-max-frequency = <80000000>;
// spi-rx-bus-width = <4>;
// spi-tx-bus-width = <1>;
// };
//};
//&sdmmc {
// max-frequency = <50000000>;
// no-sdio;
// no-mmc;
// bus-width = <4>;
// cap-mmc-highspeed;
// cap-sd-highspeed;
// disable-wp;
// pinctrl-names = "default";
// pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
// status = "okay";
//};
&tsadc {
status = "okay";
};

148
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-mini-a.dts Executable file
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@ -0,0 +1,148 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Luckfox Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1103.dtsi"
#include "rv1106-evb.dtsi"
#include "rv1103-luckfox-pico-mini-ipc.dtsi"
/ {
model = "Luckfox Pico Mini A";
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
};
// /**********ETH**********/
&gmac {
status = "disabled";
};
/**********USB**********/
//&usbdrd {
// status = "disabled";
//};
//&usbdrd_dwc3 {
// status = "disabled";
//};
//&u2phy {
// status = "disabled";
//};
//&u2phy_otg {
// status = "disabled";
//};
// /**********I2C**********/
&i2c3 {
status = "okay";
pinctrl-0 = <&i2c3m1_xfer>;
clock-frequency = <100000>;
};
// /**********SPI**********/
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0m0_pins>;
cs-gpios = <&gpio1 RK_PC0 1>;
// cs-gpios = <&gpio1 RK_PD3 1>;
#address-cells = <1>;
#size-cells = <0>;
spidev@0 {
compatible = "rockchip,spidev";
spi-max-frequency = <1000000000>;
reg = <0>;
};
};
/**********UART**********/
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
/**********PWM**********/
// &pwm0 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm0m0_pins>;
// // pinctrl-0 = <&pwm0m1_pins>;
// };
// &pwm1 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm1m0_pins>;
// // pinctrl-0 = <&pwm1m1_pins>;
// };
//&pwm2 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm2m2_pins>;
//};
//&pwm3 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm3m2_pins>;
//};
//&pwm4 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm4m2_pins>;
//};
//&pwm5 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm5m2_pins>;
//};
//&pwm6 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm6m2_pins>;
//};
//&pwm7 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm7m2_pins>;
//};
//&pwm8 {
// status = "okay";
// pinctrl-names = "active";
// // pinctrl-0 = <&pwm8m1_pins>;
// pinctrl-0 = <&pwm8m0_pins>;
//};
//&pwm9 {
// status = "okay";
// pinctrl-names = "active";
// // pinctrl-0 = <&pwm9m1_pins>;
// pinctrl-0 = <&pwm9m0_pins>;
//};
&pwm10 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm10m1_pins>;
// pinctrl-0 = <&pwm10m2_pins>;
// pinctrl-0 = <&pwm10m0_pins>;
};
&pwm11 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm11m1_pins>;
// pinctrl-0 = <&pwm11m2_pins>;
// pinctrl-0 = <&pwm11m0_pins>;
};

171
sysdrv/source/kernel/arch/arm/boot/dts/rv1103g-luckfox-pico-mini-b.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Luckfox Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1103.dtsi"
#include "rv1106-evb.dtsi"
#include "rv1103-luckfox-pico-mini-ipc.dtsi"
/ {
model = "Luckfox Pico Mini B";
compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1103";
};
&sfc {
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <75000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
/**********SDMMC**********/
&sdmmc {
max-frequency = <50000000>;
no-sdio;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
status = "okay";
};
// /**********ETH**********/
&gmac {
status = "disabled";
};
/**********USB**********/
//&usbdrd {
// status = "disabled";
//};
//&usbdrd_dwc3 {
// status = "disabled";
//};
//&u2phy {
// status = "disabled";
//};
//&u2phy_otg {
// status = "disabled";
//};
// /**********I2C**********/
&i2c3 {
status = "okay";
pinctrl-0 = <&i2c3m1_xfer>;
clock-frequency = <100000>;
};
// /**********SPI**********/
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0m0_pins>;
cs-gpios = <&gpio1 RK_PC0 1>;
// cs-gpios = <&gpio1 RK_PD3 1>;
#address-cells = <1>;
#size-cells = <0>;
spidev@0 {
compatible = "rockchip,spidev";
spi-max-frequency = <1000000000>;
reg = <0>;
};
};
/**********UART**********/
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
/**********PWM**********/
// &pwm0 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm0m0_pins>;
// // pinctrl-0 = <&pwm0m1_pins>;
// };
// &pwm1 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm1m0_pins>;
// // pinctrl-0 = <&pwm1m1_pins>;
// };
//&pwm2 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm2m2_pins>;
//};
//&pwm3 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm3m2_pins>;
//};
//&pwm4 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm4m2_pins>;
//};
//&pwm5 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm5m2_pins>;
//};
//&pwm6 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm6m2_pins>;
//};
//&pwm7 {
// status = "okay";
// pinctrl-names = "active";
// pinctrl-0 = <&pwm7m2_pins>;
//};
//&pwm8 {
// status = "okay";
// pinctrl-names = "active";
// // pinctrl-0 = <&pwm8m1_pins>;
// pinctrl-0 = <&pwm8m0_pins>;
//};
//&pwm9 {
// status = "okay";
// pinctrl-names = "active";
// // pinctrl-0 = <&pwm9m1_pins>;
// pinctrl-0 = <&pwm9m0_pins>;
//};
&pwm10 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm10m1_pins>;
// pinctrl-0 = <&pwm10m2_pins>;
// pinctrl-0 = <&pwm10m0_pins>;
};
&pwm11 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm11m1_pins>;
// pinctrl-0 = <&pwm11m2_pins>;
// pinctrl-0 = <&pwm11m0_pins>;
};

0
sysdrv/source/kernel/arch/arm/boot/dts/rv1106-luckfox-pico-max-ipc.dtsi → sysdrv/source/kernel/arch/arm/boot/dts/rv1106-luckfox-pico-pro-max-ipc.dtsi
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2
sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-max.dts → sysdrv/source/kernel/arch/arm/boot/dts/rv1106g-luckfox-pico-pro-max.dts
View File

@ -7,7 +7,7 @@
#include "rv1106.dtsi"
#include "rv1106-evb.dtsi"
#include "rv1106-luckfox-pico-max-ipc.dtsi"
#include "rv1106-luckfox-pico-pro-max-ipc.dtsi"
/ {
model = "Luckfox Pico Max";