8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
127 lines
4.4 KiB
C
127 lines
4.4 KiB
C
/*
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* Copyright (c) 2015 iComm-semi Ltd.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _HCTRL_H_
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#define _HCTRL_H_
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#define IFDEV(_ct) ((_ct)->dev)
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#define IFOPS(_ct) ((_ct)->if_ops)
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#define HCI_REG_READ(_ct, _adr, _val) IFOPS(_ct)->readreg(IFDEV(_ct), _adr, _val)
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#define HCI_REG_WRITE(_ct,_adr, _val) IFOPS(_ct)->writereg(IFDEV(_ct), _adr, _val)
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#define IF_SEND(_ct, _bf, _len, _qid) IFOPS(_ct)->write(IFDEV(_ct), _bf, _len, _qid)
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#define IF_RECV(_ct, _bf, _len, _mode) IFOPS(_ct)->read(IFDEV(_ct), _bf, _len, _mode)
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#define IF_RESET(_ct) IFOPS(_ct)->fw_reset(IFDEV(_ct))
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#ifdef SSV_PERFORMANCE_WATCH
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#define IF_GET_INFO(_ct) IFOPS(_ct)->get_info(IFDEV(_ct), _info)
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#define IF_CLR_INFO(_ct) IFOPS(_ct)->clr_info(IFDEV(_ct))
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#endif
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#define HCI_TX_AGGR_SKB_LEN (32 * 1024)
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/**
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* Define flags for enqueue API
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*/
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#define HCI_FLAGS_ENQUEUE_HEAD 0x00000001
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struct ssv_sw_txq {
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u32 txq_no;
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struct mutex txq_lock;
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struct sk_buff_head qhead;
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bool inactive; ///< Inactive status, true: drop packets; false: not to drop packets
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bool paused; ///< Pasued status, true: keep packets(do nothing); false: process packets
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/* statistic counters: */
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u32 tx_pkt;
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u32 tx_flags;
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};
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struct ssv6xxx_hci_ctrl {
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struct ssv6xxx_hci_info *shi;
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struct device *dev;
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struct ssv6xxx_hwif_ops *if_ops;
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struct mutex hci_mutex;
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struct ssv_sw_txq sw_txq[SSV_SW_TXQ_NUM];
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/* hardware tx queue packet counter */
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atomic_t sw_txq_cnt;
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wait_queue_head_t tx_wait_q;
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struct task_struct *hci_tx_task;
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unsigned long tx_timestamp;
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unsigned long rx_timestamp;
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bool tx_trigger_en;
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u32 tx_trigger_qlen;
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u32 rx_pkt; // receive rx packet
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u32 post_rx_pkt; // de-aggr rx packet
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wait_queue_head_t rx_wait_q;
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struct sk_buff_head rx_skb_q;
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struct task_struct *hci_rx_task;
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bool hw_tx_resource_full;
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u32 hw_tx_resource_full_cnt;
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#ifdef CONFIG_SDIO_FAVOR_RX
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volatile bool hw_sdio_rx_available;
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#endif
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/* capability inherit from smac */
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u32 hci_cap;
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/* hci tx aggr pre-alloc skb */
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struct sk_buff *p_tx_aggr_skb;
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/* Post Tx callback function */
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void (*hci_post_tx_cb)(struct sk_buff_head *, void *);
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void *hci_post_tx_cb_args;
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/* check resource */
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int (*check_resource_cb)(void *app_param, struct sk_buff_head *, int reserved_page, int *p_max_count);
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void *check_resource_cb_args;
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/* proc_rx */
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proc_rx_cb rx_cb[MAX_RX_CB_NUM];
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void *rx_cb_args[MAX_RX_CB_NUM];
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#ifdef SSV_PERFORMANCE_WATCH
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unsigned long skip_fmac_to_hci;
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unsigned long skip_hci_to_hwif;
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unsigned long tx_run_time;
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unsigned long tx_run_size;
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unsigned long tx_run_cnt;
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unsigned long no_tx_resource_cnt;
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unsigned long zero_resource_cnt;
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unsigned long less_resource_10percent_cnt;
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unsigned long over_resource_10percent_cnt;
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#endif
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};
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static inline void ssv6xxx_hwif_rx_task(struct ssv6xxx_hci_ctrl *hctrl, int (*rx_cb)(struct sk_buff *rx_skb, void *args),
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int (*is_rx_q_full)(void *args), u32 recv_cnt)
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{
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if(hctrl->if_ops->hwif_rx_task)
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hctrl->if_ops->hwif_rx_task(IFDEV(hctrl), rx_cb, is_rx_q_full, (void *)hctrl, recv_cnt);
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}
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static inline void ssv6xxx_hwif_get_tx_req_cnt(struct ssv6xxx_hci_ctrl *hctrl, int *tx_reg_cnt)
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{
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if(hctrl->if_ops->get_tx_req_cnt)
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hctrl->if_ops->get_tx_req_cnt(IFDEV(hctrl), tx_reg_cnt);
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}
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#define HCI_RX_TASK(ct, rx_cb, is_rx_q_full, recv_cnt) ssv6xxx_hwif_rx_task(ct, rx_cb, is_rx_q_full, recv_cnt)
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#define HCI_HWIF_GET_TX_REQ_CNT(ct, value) ssv6xxx_hwif_get_tx_req_cnt(ct, value)
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#endif
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