8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
76 lines
1.8 KiB
C
76 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2016 NVIDIA Corporation
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*/
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#include <linux/reset-controller.h>
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#include <soc/tegra/bpmp.h>
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#include <soc/tegra/bpmp-abi.h>
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static struct tegra_bpmp *to_tegra_bpmp(struct reset_controller_dev *rstc)
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{
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return container_of(rstc, struct tegra_bpmp, rstc);
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}
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static int tegra_bpmp_reset_common(struct reset_controller_dev *rstc,
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enum mrq_reset_commands command,
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unsigned int id)
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{
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struct tegra_bpmp *bpmp = to_tegra_bpmp(rstc);
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struct mrq_reset_request request;
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struct tegra_bpmp_message msg;
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int err;
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memset(&request, 0, sizeof(request));
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request.cmd = command;
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request.reset_id = id;
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memset(&msg, 0, sizeof(msg));
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msg.mrq = MRQ_RESET;
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msg.tx.data = &request;
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msg.tx.size = sizeof(request);
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err = tegra_bpmp_transfer(bpmp, &msg);
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if (err)
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return err;
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if (msg.rx.ret)
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return -EINVAL;
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return 0;
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}
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static int tegra_bpmp_reset_module(struct reset_controller_dev *rstc,
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unsigned long id)
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{
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return tegra_bpmp_reset_common(rstc, CMD_RESET_MODULE, id);
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}
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static int tegra_bpmp_reset_assert(struct reset_controller_dev *rstc,
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unsigned long id)
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{
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return tegra_bpmp_reset_common(rstc, CMD_RESET_ASSERT, id);
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}
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static int tegra_bpmp_reset_deassert(struct reset_controller_dev *rstc,
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unsigned long id)
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{
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return tegra_bpmp_reset_common(rstc, CMD_RESET_DEASSERT, id);
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}
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static const struct reset_control_ops tegra_bpmp_reset_ops = {
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.reset = tegra_bpmp_reset_module,
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.assert = tegra_bpmp_reset_assert,
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.deassert = tegra_bpmp_reset_deassert,
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};
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int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp)
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{
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bpmp->rstc.ops = &tegra_bpmp_reset_ops;
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bpmp->rstc.owner = THIS_MODULE;
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bpmp->rstc.of_node = bpmp->dev->of_node;
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bpmp->rstc.nr_resets = bpmp->soc->num_resets;
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return devm_reset_controller_register(bpmp->dev, &bpmp->rstc);
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}
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