8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
87 lines
2.0 KiB
YAML
87 lines
2.0 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Global Clock & Reset Controller Binding for MSM8996
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maintainers:
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- Stephen Boyd <sboyd@kernel.org>
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- Taniya Das <tdas@codeaurora.org>
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description: |
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Qualcomm global clock control module which supports the clocks, resets and
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power domains on MSM8996.
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See also:
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- dt-bindings/clock/qcom,gcc-msm8996.h
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properties:
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compatible:
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const: qcom,gcc-msm8996
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clocks:
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minItems: 3
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items:
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- description: XO source
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- description: Second XO source
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- description: Sleep clock source
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- description: PCIe 0 PIPE clock (optional)
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- description: PCIe 1 PIPE clock (optional)
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- description: PCIe 2 PIPE clock (optional)
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- description: USB3 PIPE clock (optional)
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- description: UFS RX symbol 0 clock (optional)
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- description: UFS RX symbol 1 clock (optional)
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- description: UFS TX symbol 0 clock (optional)
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clock-names:
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minItems: 3
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items:
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- const: cxo
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- const: cxo2
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- const: sleep_clk
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- const: pcie_0_pipe_clk_src
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- const: pcie_1_pipe_clk_src
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- const: pcie_2_pipe_clk_src
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- const: usb3_phy_pipe_clk_src
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- const: ufs_rx_symbol_0_clk_src
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- const: ufs_rx_symbol_1_clk_src
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- const: ufs_tx_symbol_0_clk_src
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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'#power-domain-cells':
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const: 1
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reg:
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maxItems: 1
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protected-clocks:
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description:
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Protected clock specifier list as per common clock binding.
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required:
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- compatible
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- reg
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: false
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examples:
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- |
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clock-controller@300000 {
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compatible = "qcom,gcc-msm8996";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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reg = <0x300000 0x90000>;
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};
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...
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