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luckfox-pico-sdk/sysdrv/source/mcu/rt-thread/applications/battery-ipc/rkisp3-config.h
luckfox-eng29 8f34c2760d project:build.sh: Added fastboot support; custom modifications to U-Boot and kernel implemented using patches. 
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between
the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door
for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more
usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp:
Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for
compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem.
sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device
tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately.
sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick
boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades.
sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for
fastboot.

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
2024-10-14 09:47:04 +08:00

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/**
* Copyright (c) 2022 Rockchip Electronic Co.,Ltd
*
* SPDX-License-Identifier: Apache-2.0
******************************************************************************
* @version V0.0.1
*
* Change Logs:
* Date Author Notes
* 2022-07-07 ISP Team first implementation
*
******************************************************************************
*/
#ifndef _UAPI_RKISP3_CONFIG_H
#define _UAPI_RKISP3_CONFIG_H
#include "rkisp21-config.h"
#define ISP3X_MODULE_DPCC ISP2X_MODULE_DPCC
#define ISP3X_MODULE_BLS ISP2X_MODULE_BLS
#define ISP3X_MODULE_SDG ISP2X_MODULE_SDG
#define ISP3X_MODULE_LSC ISP2X_MODULE_LSC
#define ISP3X_MODULE_AWB_GAIN ISP2X_MODULE_AWB_GAIN
#define ISP3X_MODULE_BDM ISP2X_MODULE_BDM
#define ISP3X_MODULE_CCM ISP2X_MODULE_CCM
#define ISP3X_MODULE_GOC ISP2X_MODULE_GOC
#define ISP3X_MODULE_CPROC ISP2X_MODULE_CPROC
#define ISP3X_MODULE_IE ISP2X_MODULE_IE
#define ISP3X_MODULE_RAWAF ISP2X_MODULE_RAWAF
#define ISP3X_MODULE_RAWAE0 ISP2X_MODULE_RAWAE0
#define ISP3X_MODULE_RAWAE1 ISP2X_MODULE_RAWAE1
#define ISP3X_MODULE_RAWAE2 ISP2X_MODULE_RAWAE2
#define ISP3X_MODULE_RAWAE3 ISP2X_MODULE_RAWAE3
#define ISP3X_MODULE_RAWAWB ISP2X_MODULE_RAWAWB
#define ISP3X_MODULE_RAWHIST0 ISP2X_MODULE_RAWHIST0
#define ISP3X_MODULE_RAWHIST1 ISP2X_MODULE_RAWHIST1
#define ISP3X_MODULE_RAWHIST2 ISP2X_MODULE_RAWHIST2
#define ISP3X_MODULE_RAWHIST3 ISP2X_MODULE_RAWHIST3
#define ISP3X_MODULE_HDRMGE ISP2X_MODULE_HDRMGE
#define ISP3X_MODULE_RAWNR ISP2X_MODULE_RAWNR
#define ISP3X_MODULE_GIC ISP2X_MODULE_GIC
#define ISP3X_MODULE_DHAZ ISP2X_MODULE_DHAZ
#define ISP3X_MODULE_3DLUT ISP2X_MODULE_3DLUT
#define ISP3X_MODULE_LDCH ISP2X_MODULE_LDCH
#define ISP3X_MODULE_GAIN ISP2X_MODULE_GAIN
#define ISP3X_MODULE_DEBAYER ISP2X_MODULE_DEBAYER
#define ISP3X_MODULE_BAYNR ISP2X_MODULE_BAYNR
#define ISP3X_MODULE_BAY3D ISP2X_MODULE_BAY3D
#define ISP3X_MODULE_YNR ISP2X_MODULE_YNR
#define ISP3X_MODULE_CNR ISP2X_MODULE_CNR
#define ISP3X_MODULE_SHARP ISP2X_MODULE_SHARP
#define ISP3X_MODULE_DRC ISP2X_MODULE_DRC
#define ISP3X_MODULE_CAC BIT_ULL(42)
#define ISP3X_MODULE_CSM ISP2X_MODULE_CSM
#define ISP3X_MODULE_CGC ISP2X_MODULE_CGC
#define ISP3X_MODULE_FORCE ISP2X_MODULE_FORCE
/* Measurement types */
#define ISP3X_STAT_RAWAWB ISP2X_STAT_RAWAWB
#define ISP3X_STAT_RAWAF ISP2X_STAT_RAWAF
#define ISP3X_STAT_RAWAE0 ISP2X_STAT_RAWAE0
#define ISP3X_STAT_RAWAE1 ISP2X_STAT_RAWAE1
#define ISP3X_STAT_RAWAE2 ISP2X_STAT_RAWAE2
#define ISP3X_STAT_RAWAE3 ISP2X_STAT_RAWAE3
#define ISP3X_STAT_RAWHST0 ISP2X_STAT_RAWHST0
#define ISP3X_STAT_RAWHST1 ISP2X_STAT_RAWHST1
#define ISP3X_STAT_RAWHST2 ISP2X_STAT_RAWHST2
#define ISP3X_STAT_RAWHST3 ISP2X_STAT_RAWHST3
#define ISP3X_STAT_BLS ISP2X_STAT_BLS
#define ISP3X_STAT_DHAZ ISP2X_STAT_DHAZ
#define ISP3X_MESH_BUF_NUM ISP2X_MESH_BUF_NUM
#define ISP3X_LSC_GRAD_TBL_SIZE 16
#define ISP3X_LSC_SIZE_TBL_SIZE 16
#define ISP3X_LSC_DATA_TBL_SIZE ISP2X_LSC_DATA_TBL_SIZE
#define ISP3X_DEGAMMA_CURVE_SIZE ISP2X_DEGAMMA_CURVE_SIZE
#define ISP3X_GAIN_IDX_NUM ISP2X_GAIN_IDX_NUM
#define ISP3X_GAIN_LUT_NUM ISP2X_GAIN_LUT_NUM
#define ISP3X_RAWAWB_MULWD_NUM 4
#define ISP3X_RAWAWB_EXCL_STAT_NUM 4
#define ISP3X_RAWAWB_HSTBIN_NUM ISP21_RAWAWB_HSTBIN_NUM
#define ISP3X_RAWAWB_WEIGHT_NUM ISP21_RAWAWB_WEIGHT_NUM
#define ISP3X_RAWAWB_SUM_NUM ISP2X_RAWAWB_SUM_NUM
#define ISP3X_RAWAWB_RAMDATA_NUM ISP2X_RAWAWB_RAMDATA_NUM
#define ISP3X_RAWAEBIG_SUBWIN_NUM ISP2X_RAWAEBIG_SUBWIN_NUM
#define ISP3X_RAWAEBIG_MEAN_NUM ISP2X_RAWAEBIG_MEAN_NUM
#define ISP3X_RAWAELITE_MEAN_NUM ISP2X_RAWAELITE_MEAN_NUM
#define ISP3X_RAWHISTBIG_SUBWIN_NUM ISP2X_RAWHISTBIG_SUBWIN_NUM
#define ISP3X_RAWHISTLITE_SUBWIN_NUM ISP2X_RAWHISTLITE_SUBWIN_NUM
#define ISP3X_HIST_BIN_N_MAX ISP2X_HIST_BIN_N_MAX
#define ISP3X_RAWAF_CURVE_NUM 2
#define ISP3X_RAWAF_HIIR_COE_NUM 6
#define ISP3X_RAWAF_V1IIR_COE_NUM 9
#define ISP3X_RAWAF_V2IIR_COE_NUM 3
#define ISP3X_RAWAF_VFIR_COE_NUM 3
#define ISP3X_RAWAF_WIN_NUM ISP2X_RAWAF_WIN_NUM
#define ISP3X_RAWAF_LINE_NUM ISP2X_RAWAF_LINE_NUM
#define ISP3X_RAWAF_GAMMA_NUM ISP2X_RAWAF_GAMMA_NUM
#define ISP3X_RAWAF_SUMDATA_NUM ISP2X_RAWAF_SUMDATA_NUM
#define ISP3X_DPCC_PDAF_POINT_NUM ISP2X_DPCC_PDAF_POINT_NUM
#define ISP3X_HDRMGE_L_CURVE_NUM ISP2X_HDRMGE_L_CURVE_NUM
#define ISP3X_HDRMGE_E_CURVE_NUM ISP2X_HDRMGE_E_CURVE_NUM
#define ISP3X_GIC_SIGMA_Y_NUM ISP2X_GIC_SIGMA_Y_NUM
#define ISP3X_CCM_CURVE_NUM ISP2X_CCM_CURVE_NUM
#define ISP3X_3DLUT_DATA_NUM ISP2X_3DLUT_DATA_NUM
#define ISP3X_LDCH_MESH_XY_NUM ISP2X_LDCH_MESH_XY_NUM
#define ISP3X_GAMMA_OUT_MAX_SAMPLES 49
#define ISP3X_DHAZ_SIGMA_IDX_NUM 15
#define ISP3X_DHAZ_SIGMA_LUT_NUM 17
#define ISP3X_DHAZ_HIST_WR_NUM 64
#define ISP3X_DHAZ_ENH_CURVE_NUM ISP21_DHAZ_ENH_CURVE_NUM
#define ISP3X_DHAZ_HIST_IIR_NUM ISP21_DHAZ_HIST_IIR_NUM
#define ISP3X_DRC_Y_NUM ISP21_DRC_Y_NUM
#define ISP3X_CNR_SIGMA_Y_NUM 13
#define ISP3X_YNR_XY_NUM ISP21_YNR_XY_NUM
#define ISP3X_BAYNR_XY_NUM ISP21_BAYNR_XY_NUM
#define ISP3X_BAY3D_XY_NUM ISP21_BAY3D_XY_NUM
#define ISP3X_SHARP_X_NUM ISP21_SHARP_X_NUM
#define ISP3X_SHARP_Y_NUM ISP21_SHARP_Y_NUM
#define ISP3X_SHARP_GAUS_COEF_NUM 6
#define ISP3X_CAC_STRENGTH_NUM 22
#define ISP3X_CSM_COEFF_NUM ISP21_CSM_COEFF_NUM
enum isp3x_unite_id
{
ISP3_LEFT = 0,
ISP3_RIGHT,
ISP3_UNITE_MAX,
};
struct isp3x_gammaout_cfg
{
uint8_t equ_segm;
uint8_t finalx4_dense_en;
uint16_t offset;
uint16_t gamma_y[ISP3X_GAMMA_OUT_MAX_SAMPLES];
} __attribute__((packed));
struct isp3x_lsc_cfg
{
uint8_t sector_16x16;
uint16_t r_data_tbl[ISP3X_LSC_DATA_TBL_SIZE];
uint16_t gr_data_tbl[ISP3X_LSC_DATA_TBL_SIZE];
uint16_t gb_data_tbl[ISP3X_LSC_DATA_TBL_SIZE];
uint16_t b_data_tbl[ISP3X_LSC_DATA_TBL_SIZE];
uint16_t x_grad_tbl[ISP3X_LSC_GRAD_TBL_SIZE];
uint16_t y_grad_tbl[ISP3X_LSC_GRAD_TBL_SIZE];
uint16_t x_size_tbl[ISP3X_LSC_SIZE_TBL_SIZE];
uint16_t y_size_tbl[ISP3X_LSC_SIZE_TBL_SIZE];
} __attribute__((packed));
struct isp3x_baynr_cfg
{
uint8_t lg2_mode;
uint8_t gauss_en;
uint8_t log_bypass;
uint16_t dgain1;
uint16_t dgain0;
uint16_t dgain2;
uint16_t pix_diff;
uint16_t diff_thld;
uint16_t softthld;
uint16_t bltflt_streng;
uint16_t reg_w1;
uint16_t sigma_x[ISP3X_BAYNR_XY_NUM];
uint16_t sigma_y[ISP3X_BAYNR_XY_NUM];
uint16_t weit_d2;
uint16_t weit_d1;
uint16_t weit_d0;
uint16_t lg2_lgoff;
uint16_t lg2_off;
uint32_t dat_max;
} __attribute__((packed));
struct isp3x_bay3d_cfg
{
uint8_t bypass_en;
uint8_t hibypass_en;
uint8_t lobypass_en;
uint8_t himed_bypass_en;
uint8_t higaus_bypass_en;
uint8_t hiabs_possel;
uint8_t hichnsplit_en;
uint8_t lomed_bypass_en;
uint8_t logaus5_bypass_en;
uint8_t logaus3_bypass_en;
uint8_t glbpk_en;
uint8_t loswitch_protect;
uint16_t softwgt;
uint16_t hidif_th;
uint32_t glbpk2;
uint16_t wgtlmt;
uint16_t wgtratio;
uint16_t sig0_x[ISP3X_BAY3D_XY_NUM];
uint16_t sig0_y[ISP3X_BAY3D_XY_NUM];
uint16_t sig1_x[ISP3X_BAY3D_XY_NUM];
uint16_t sig1_y[ISP3X_BAY3D_XY_NUM];
uint16_t sig2_x[ISP3X_BAY3D_XY_NUM];
uint16_t sig2_y[ISP3X_BAY3D_XY_NUM];
} __attribute__((packed));
struct isp3x_ynr_cfg
{
uint8_t rnr_en;
uint8_t thumb_mix_cur_en;
uint8_t global_gain_alpha;
uint8_t flt1x1_bypass_sel;
uint8_t sft5x5_bypass;
uint8_t flt1x1_bypass;
uint8_t lgft3x3_bypass;
uint8_t lbft5x5_bypass;
uint8_t bft3x3_bypass;
uint16_t global_gain;
uint16_t rnr_max_r;
uint16_t local_gainscale;
uint16_t rnr_center_coorh;
uint16_t rnr_center_coorv;
uint16_t loclagain_adj_thresh;
uint16_t localgain_adj;
uint16_t low_bf_inv1;
uint16_t low_bf_inv0;
uint16_t low_peak_supress;
uint16_t low_thred_adj;
uint16_t low_dist_adj;
uint16_t low_edge_adj_thresh;
uint16_t low_bi_weight;
uint16_t low_weight;
uint16_t low_center_weight;
uint16_t hi_min_adj;
uint16_t high_thred_adj;
uint8_t high_retain_weight;
uint8_t hi_edge_thed;
uint8_t base_filter_weight2;
uint8_t base_filter_weight1;
uint8_t base_filter_weight0;
uint16_t frame_full_size;
uint16_t lbf_weight_thres;
uint16_t low_gauss1_coeff2;
uint16_t low_gauss1_coeff1;
uint16_t low_gauss1_coeff0;
uint16_t low_gauss2_coeff2;
uint16_t low_gauss2_coeff1;
uint16_t low_gauss2_coeff0;
uint8_t direction_weight3;
uint8_t direction_weight2;
uint8_t direction_weight1;
uint8_t direction_weight0;
uint8_t direction_weight7;
uint8_t direction_weight6;
uint8_t direction_weight5;
uint8_t direction_weight4;
uint16_t luma_points_x[ISP3X_YNR_XY_NUM];
uint16_t lsgm_y[ISP3X_YNR_XY_NUM];
uint16_t hsgm_y[ISP3X_YNR_XY_NUM];
uint8_t rnr_strength3[ISP3X_YNR_XY_NUM];
} __attribute__((packed));
struct isp3x_cnr_cfg
{
uint8_t thumb_mix_cur_en;
uint8_t lq_bila_bypass;
uint8_t hq_bila_bypass;
uint8_t exgain_bypass;
uint8_t global_gain_alpha;
uint16_t global_gain;
uint8_t gain_iso;
uint8_t gain_offset;
uint8_t gain_1sigma;
uint8_t gain_uvgain1;
uint8_t gain_uvgain0;
uint8_t lmed3_alpha;
uint8_t lbf5_gain_y;
uint8_t lbf5_gain_c;
uint8_t lbf5_weit_d3;
uint8_t lbf5_weit_d2;
uint8_t lbf5_weit_d1;
uint8_t lbf5_weit_d0;
uint8_t lbf5_weit_d4;
uint8_t hmed3_alpha;
uint16_t hbf5_weit_src;
uint16_t hbf5_min_wgt;
uint16_t hbf5_sigma;
uint16_t lbf5_weit_src;
uint16_t lbf3_sigma;
uint8_t sigma_y[ISP3X_CNR_SIGMA_Y_NUM];
} __attribute__((packed));
struct isp3x_sharp_cfg
{
uint8_t bypass;
uint8_t center_mode;
uint8_t exgain_bypass;
uint8_t sharp_ratio;
uint8_t bf_ratio;
uint8_t gaus_ratio;
uint8_t pbf_ratio;
uint8_t luma_dx[ISP3X_SHARP_X_NUM];
uint16_t pbf_sigma_inv[ISP3X_SHARP_Y_NUM];
uint16_t bf_sigma_inv[ISP3X_SHARP_Y_NUM];
uint8_t bf_sigma_shift;
uint8_t pbf_sigma_shift;
uint16_t ehf_th[ISP3X_SHARP_Y_NUM];
uint16_t clip_hf[ISP3X_SHARP_Y_NUM];
uint8_t pbf_coef2;
uint8_t pbf_coef1;
uint8_t pbf_coef0;
uint8_t bf_coef2;
uint8_t bf_coef1;
uint8_t bf_coef0;
uint8_t gaus_coef[ISP3X_SHARP_GAUS_COEF_NUM];
} __attribute__((packed));
struct isp3x_dhaz_cfg
{
uint8_t round_en;
uint8_t soft_wr_en;
uint8_t enhance_en;
uint8_t air_lc_en;
uint8_t hpara_en;
uint8_t hist_en;
uint8_t dc_en;
uint8_t yblk_th;
uint8_t yhist_th;
uint8_t dc_max_th;
uint8_t dc_min_th;
uint16_t wt_max;
uint8_t bright_max;
uint8_t bright_min;
uint8_t tmax_base;
uint8_t dark_th;
uint8_t air_max;
uint8_t air_min;
uint16_t tmax_max;
uint16_t tmax_off;
uint8_t hist_k;
uint8_t hist_th_off;
uint16_t hist_min;
uint16_t hist_gratio;
uint16_t hist_scale;
uint16_t enhance_value;
uint16_t enhance_chroma;
uint16_t iir_wt_sigma;
uint16_t iir_sigma;
uint16_t stab_fnum;
uint16_t iir_tmax_sigma;
uint16_t iir_air_sigma;
uint8_t iir_pre_wet;
uint16_t cfg_wt;
uint16_t cfg_air;
uint16_t cfg_alpha;
uint16_t cfg_gratio;
uint16_t cfg_tmax;
uint16_t range_sima;
uint8_t space_sigma_pre;
uint8_t space_sigma_cur;
uint16_t dc_weitcur;
uint16_t bf_weight;
uint16_t enh_curve[ISP3X_DHAZ_ENH_CURVE_NUM];
uint8_t gaus_h2;
uint8_t gaus_h1;
uint8_t gaus_h0;
uint8_t sigma_idx[ISP3X_DHAZ_SIGMA_IDX_NUM];
uint16_t sigma_lut[ISP3X_DHAZ_SIGMA_LUT_NUM];
uint16_t adp_wt_wr;
uint16_t adp_air_wr;
uint16_t adp_tmax_wr;
uint16_t adp_gratio_wr;
uint16_t hist_wr[ISP3X_DHAZ_HIST_WR_NUM];
} __attribute__((packed));
struct isp3x_dhaz_stat
{
uint32_t dhaz_pic_sumh;
uint16_t dhaz_adp_air_base;
uint16_t dhaz_adp_wt;
uint16_t dhaz_adp_gratio;
uint16_t dhaz_adp_tmax;
uint16_t h_rgb_iir[ISP3X_DHAZ_HIST_IIR_NUM];
} __attribute__((packed));
struct isp3x_drc_cfg
{
uint8_t bypass_en;
uint8_t offset_pow2;
uint16_t compres_scl;
uint16_t position;
uint16_t delta_scalein;
uint16_t hpdetail_ratio;
uint16_t lpdetail_ratio;
uint8_t weicur_pix;
uint8_t weipre_frame;
uint8_t bilat_wt_off;
uint16_t force_sgm_inv0;
uint8_t motion_scl;
uint8_t edge_scl;
uint16_t space_sgm_inv1;
uint16_t space_sgm_inv0;
uint16_t range_sgm_inv1;
uint16_t range_sgm_inv0;
uint8_t weig_maxl;
uint8_t weig_bilat;
uint8_t enable_soft_thd;
uint16_t bilat_soft_thd;
uint16_t gain_y[ISP3X_DRC_Y_NUM];
uint16_t compres_y[ISP3X_DRC_Y_NUM];
uint16_t scale_y[ISP3X_DRC_Y_NUM];
uint16_t wr_cycle;
uint16_t iir_weight;
uint16_t min_ogain;
} __attribute__((packed));
struct isp3x_hdrmge_cfg
{
uint8_t s_base;
uint8_t mode;
uint16_t gain0_inv;
uint16_t gain0;
uint16_t gain1_inv;
uint16_t gain1;
uint8_t gain2;
uint8_t lm_dif_0p15;
uint8_t lm_dif_0p9;
uint8_t ms_diff_0p15;
uint8_t ms_dif_0p8;
uint16_t ms_thd1;
uint16_t ms_thd0;
uint16_t ms_scl;
uint16_t lm_thd1;
uint16_t lm_thd0;
uint16_t lm_scl;
struct isp2x_hdrmge_curve curve;
uint16_t e_y[ISP3X_HDRMGE_E_CURVE_NUM];
} __attribute__((packed));
struct isp3x_rawawb_meas_cfg
{
uint8_t rawawb_sel;
uint8_t sw_rawawb_xy_en0;
uint8_t sw_rawawb_uv_en0;
uint8_t sw_rawawb_xy_en1;
uint8_t sw_rawawb_uv_en1;
uint8_t sw_rawawb_3dyuv_en0;
uint8_t sw_rawawb_3dyuv_en1;
uint8_t sw_rawawb_wp_blk_wei_en0;
uint8_t sw_rawawb_wp_blk_wei_en1;
uint8_t sw_rawawb_wp_luma_wei_en0;
uint8_t sw_rawawb_wp_luma_wei_en1;
uint8_t sw_rawlsc_bypass_en;
uint8_t sw_rawawb_blk_measure_enable;
uint8_t sw_rawawb_blk_measure_mode;
uint8_t sw_rawawb_blk_measure_xytype;
uint8_t sw_rawawb_blk_measure_illu_idx;
uint8_t sw_rawawb_wp_hist_xytype;
uint8_t sw_rawawb_light_num;
uint8_t sw_rawawb_wind_size;
uint8_t sw_rawawb_r_max;
uint8_t sw_rawawb_g_max;
uint8_t sw_rawawb_b_max;
uint8_t sw_rawawb_y_max;
uint8_t sw_rawawb_r_min;
uint8_t sw_rawawb_g_min;
uint8_t sw_rawawb_b_min;
uint8_t sw_rawawb_y_min;
uint8_t sw_rawawb_3dyuv_ls_idx0;
uint8_t sw_rawawb_3dyuv_ls_idx1;
uint8_t sw_rawawb_3dyuv_ls_idx2;
uint8_t sw_rawawb_3dyuv_ls_idx3;
uint8_t sw_rawawb_multiwindow_en;
uint8_t sw_rawawb_exc_wp_region0_excen0;
uint8_t sw_rawawb_exc_wp_region0_excen1;
uint8_t sw_rawawb_exc_wp_region0_measen;
uint8_t sw_rawawb_exc_wp_region0_domain;
uint8_t sw_rawawb_exc_wp_region1_excen0;
uint8_t sw_rawawb_exc_wp_region1_excen1;
uint8_t sw_rawawb_exc_wp_region1_measen;
uint8_t sw_rawawb_exc_wp_region1_domain;
uint8_t sw_rawawb_exc_wp_region2_excen0;
uint8_t sw_rawawb_exc_wp_region2_excen1;
uint8_t sw_rawawb_exc_wp_region2_measen;
uint8_t sw_rawawb_exc_wp_region2_domain;
uint8_t sw_rawawb_exc_wp_region3_excen0;
uint8_t sw_rawawb_exc_wp_region3_excen1;
uint8_t sw_rawawb_exc_wp_region3_measen;
uint8_t sw_rawawb_exc_wp_region3_domain;
uint8_t sw_rawawb_exc_wp_region4_excen0;
uint8_t sw_rawawb_exc_wp_region4_excen1;
uint8_t sw_rawawb_exc_wp_region4_domain;
uint8_t sw_rawawb_exc_wp_region5_excen0;
uint8_t sw_rawawb_exc_wp_region5_excen1;
uint8_t sw_rawawb_exc_wp_region5_domain;
uint8_t sw_rawawb_exc_wp_region6_excen0;
uint8_t sw_rawawb_exc_wp_region6_excen1;
uint8_t sw_rawawb_exc_wp_region6_domain;
uint8_t sw_rawawb_wp_luma_weicurve_y0;
uint8_t sw_rawawb_wp_luma_weicurve_y1;
uint8_t sw_rawawb_wp_luma_weicurve_y2;
uint8_t sw_rawawb_wp_luma_weicurve_y3;
uint8_t sw_rawawb_wp_luma_weicurve_y4;
uint8_t sw_rawawb_wp_luma_weicurve_y5;
uint8_t sw_rawawb_wp_luma_weicurve_y6;
uint8_t sw_rawawb_wp_luma_weicurve_y7;
uint8_t sw_rawawb_wp_luma_weicurve_y8;
uint8_t sw_rawawb_wp_luma_weicurve_w0;
uint8_t sw_rawawb_wp_luma_weicurve_w1;
uint8_t sw_rawawb_wp_luma_weicurve_w2;
uint8_t sw_rawawb_wp_luma_weicurve_w3;
uint8_t sw_rawawb_wp_luma_weicurve_w4;
uint8_t sw_rawawb_wp_luma_weicurve_w5;
uint8_t sw_rawawb_wp_luma_weicurve_w6;
uint8_t sw_rawawb_wp_luma_weicurve_w7;
uint8_t sw_rawawb_wp_luma_weicurve_w8;
uint8_t sw_rawawb_rotu0_ls0;
uint8_t sw_rawawb_rotu1_ls0;
uint8_t sw_rawawb_rotu2_ls0;
uint8_t sw_rawawb_rotu3_ls0;
uint8_t sw_rawawb_rotu4_ls0;
uint8_t sw_rawawb_rotu5_ls0;
uint8_t sw_rawawb_dis_x1x2_ls0;
uint8_t sw_rawawb_rotu0_ls1;
uint8_t sw_rawawb_rotu1_ls1;
uint8_t sw_rawawb_rotu2_ls1;
uint8_t sw_rawawb_rotu3_ls1;
uint8_t sw_rawawb_rotu4_ls1;
uint8_t sw_rawawb_rotu5_ls1;
uint8_t sw_rawawb_dis_x1x2_ls1;
uint8_t sw_rawawb_rotu0_ls2;
uint8_t sw_rawawb_rotu1_ls2;
uint8_t sw_rawawb_rotu2_ls2;
uint8_t sw_rawawb_rotu3_ls2;
uint8_t sw_rawawb_rotu4_ls2;
uint8_t sw_rawawb_rotu5_ls2;
uint8_t sw_rawawb_dis_x1x2_ls2;
uint8_t sw_rawawb_rotu0_ls3;
uint8_t sw_rawawb_rotu1_ls3;
uint8_t sw_rawawb_rotu2_ls3;
uint8_t sw_rawawb_rotu3_ls3;
uint8_t sw_rawawb_rotu4_ls3;
uint8_t sw_rawawb_rotu5_ls3;
uint8_t sw_rawawb_dis_x1x2_ls3;
uint8_t sw_rawawb_blk_rtdw_measure_en;
uint8_t sw_rawawb_blk_with_luma_wei_en;
uint8_t sw_rawawb_wp_blk_wei_w[ISP3X_RAWAWB_WEIGHT_NUM];
uint16_t sw_rawawb_h_offs;
uint16_t sw_rawawb_v_offs;
uint16_t sw_rawawb_h_size;
uint16_t sw_rawawb_v_size;
uint16_t sw_rawawb_vertex0_u_0;
uint16_t sw_rawawb_vertex0_v_0;
uint16_t sw_rawawb_vertex1_u_0;
uint16_t sw_rawawb_vertex1_v_0;
uint16_t sw_rawawb_vertex2_u_0;
uint16_t sw_rawawb_vertex2_v_0;
uint16_t sw_rawawb_vertex3_u_0;
uint16_t sw_rawawb_vertex3_v_0;
uint16_t sw_rawawb_vertex0_u_1;
uint16_t sw_rawawb_vertex0_v_1;
uint16_t sw_rawawb_vertex1_u_1;
uint16_t sw_rawawb_vertex1_v_1;
uint16_t sw_rawawb_vertex2_u_1;
uint16_t sw_rawawb_vertex2_v_1;
uint16_t sw_rawawb_vertex3_u_1;
uint16_t sw_rawawb_vertex3_v_1;
uint16_t sw_rawawb_vertex0_u_2;
uint16_t sw_rawawb_vertex0_v_2;
uint16_t sw_rawawb_vertex1_u_2;
uint16_t sw_rawawb_vertex1_v_2;
uint16_t sw_rawawb_vertex2_u_2;
uint16_t sw_rawawb_vertex2_v_2;
uint16_t sw_rawawb_vertex3_u_2;
uint16_t sw_rawawb_vertex3_v_2;
uint16_t sw_rawawb_vertex0_u_3;
uint16_t sw_rawawb_vertex0_v_3;
uint16_t sw_rawawb_vertex1_u_3;
uint16_t sw_rawawb_vertex1_v_3;
uint16_t sw_rawawb_vertex2_u_3;
uint16_t sw_rawawb_vertex2_v_3;
uint16_t sw_rawawb_vertex3_u_3;
uint16_t sw_rawawb_vertex3_v_3;
uint16_t sw_rawawb_vertex0_u_4;
uint16_t sw_rawawb_vertex0_v_4;
uint16_t sw_rawawb_vertex1_u_4;
uint16_t sw_rawawb_vertex1_v_4;
uint16_t sw_rawawb_vertex2_u_4;
uint16_t sw_rawawb_vertex2_v_4;
uint16_t sw_rawawb_vertex3_u_4;
uint16_t sw_rawawb_vertex3_v_4;
uint16_t sw_rawawb_vertex0_u_5;
uint16_t sw_rawawb_vertex0_v_5;
uint16_t sw_rawawb_vertex1_u_5;
uint16_t sw_rawawb_vertex1_v_5;
uint16_t sw_rawawb_vertex2_u_5;
uint16_t sw_rawawb_vertex2_v_5;
uint16_t sw_rawawb_vertex3_u_5;
uint16_t sw_rawawb_vertex3_v_5;
uint16_t sw_rawawb_vertex0_u_6;
uint16_t sw_rawawb_vertex0_v_6;
uint16_t sw_rawawb_vertex1_u_6;
uint16_t sw_rawawb_vertex1_v_6;
uint16_t sw_rawawb_vertex2_u_6;
uint16_t sw_rawawb_vertex2_v_6;
uint16_t sw_rawawb_vertex3_u_6;
uint16_t sw_rawawb_vertex3_v_6;
uint16_t sw_rawawb_wt0;
uint16_t sw_rawawb_wt1;
uint16_t sw_rawawb_wt2;
uint16_t sw_rawawb_mat0_x;
uint16_t sw_rawawb_mat1_x;
uint16_t sw_rawawb_mat2_x;
uint16_t sw_rawawb_mat0_y;
uint16_t sw_rawawb_mat1_y;
uint16_t sw_rawawb_mat2_y;
uint16_t sw_rawawb_nor_x0_0;
uint16_t sw_rawawb_nor_x1_0;
uint16_t sw_rawawb_nor_y0_0;
uint16_t sw_rawawb_nor_y1_0;
uint16_t sw_rawawb_big_x0_0;
uint16_t sw_rawawb_big_x1_0;
uint16_t sw_rawawb_big_y0_0;
uint16_t sw_rawawb_big_y1_0;
uint16_t sw_rawawb_nor_x0_1;
uint16_t sw_rawawb_nor_x1_1;
uint16_t sw_rawawb_nor_y0_1;
uint16_t sw_rawawb_nor_y1_1;
uint16_t sw_rawawb_big_x0_1;
uint16_t sw_rawawb_big_x1_1;
uint16_t sw_rawawb_big_y0_1;
uint16_t sw_rawawb_big_y1_1;
uint16_t sw_rawawb_nor_x0_2;
uint16_t sw_rawawb_nor_x1_2;
uint16_t sw_rawawb_nor_y0_2;
uint16_t sw_rawawb_nor_y1_2;
uint16_t sw_rawawb_big_x0_2;
uint16_t sw_rawawb_big_x1_2;
uint16_t sw_rawawb_big_y0_2;
uint16_t sw_rawawb_big_y1_2;
uint16_t sw_rawawb_nor_x0_3;
uint16_t sw_rawawb_nor_x1_3;
uint16_t sw_rawawb_nor_y0_3;
uint16_t sw_rawawb_nor_y1_3;
uint16_t sw_rawawb_big_x0_3;
uint16_t sw_rawawb_big_x1_3;
uint16_t sw_rawawb_big_y0_3;
uint16_t sw_rawawb_big_y1_3;
uint16_t sw_rawawb_nor_x0_4;
uint16_t sw_rawawb_nor_x1_4;
uint16_t sw_rawawb_nor_y0_4;
uint16_t sw_rawawb_nor_y1_4;
uint16_t sw_rawawb_big_x0_4;
uint16_t sw_rawawb_big_x1_4;
uint16_t sw_rawawb_big_y0_4;
uint16_t sw_rawawb_big_y1_4;
uint16_t sw_rawawb_nor_x0_5;
uint16_t sw_rawawb_nor_x1_5;
uint16_t sw_rawawb_nor_y0_5;
uint16_t sw_rawawb_nor_y1_5;
uint16_t sw_rawawb_big_x0_5;
uint16_t sw_rawawb_big_x1_5;
uint16_t sw_rawawb_big_y0_5;
uint16_t sw_rawawb_big_y1_5;
uint16_t sw_rawawb_nor_x0_6;
uint16_t sw_rawawb_nor_x1_6;
uint16_t sw_rawawb_nor_y0_6;
uint16_t sw_rawawb_nor_y1_6;
uint16_t sw_rawawb_big_x0_6;
uint16_t sw_rawawb_big_x1_6;
uint16_t sw_rawawb_big_y0_6;
uint16_t sw_rawawb_big_y1_6;
uint16_t sw_rawawb_pre_wbgain_inv_r;
uint16_t sw_rawawb_pre_wbgain_inv_g;
uint16_t sw_rawawb_pre_wbgain_inv_b;
uint16_t sw_rawawb_multiwindow0_v_offs;
uint16_t sw_rawawb_multiwindow0_h_offs;
uint16_t sw_rawawb_multiwindow0_v_size;
uint16_t sw_rawawb_multiwindow0_h_size;
uint16_t sw_rawawb_multiwindow1_v_offs;
uint16_t sw_rawawb_multiwindow1_h_offs;
uint16_t sw_rawawb_multiwindow1_v_size;
uint16_t sw_rawawb_multiwindow1_h_size;
uint16_t sw_rawawb_multiwindow2_v_offs;
uint16_t sw_rawawb_multiwindow2_h_offs;
uint16_t sw_rawawb_multiwindow2_v_size;
uint16_t sw_rawawb_multiwindow2_h_size;
uint16_t sw_rawawb_multiwindow3_v_offs;
uint16_t sw_rawawb_multiwindow3_h_offs;
uint16_t sw_rawawb_multiwindow3_v_size;
uint16_t sw_rawawb_multiwindow3_h_size;
uint16_t sw_rawawb_exc_wp_region0_xu0;
uint16_t sw_rawawb_exc_wp_region0_xu1;
uint16_t sw_rawawb_exc_wp_region0_yv0;
uint16_t sw_rawawb_exc_wp_region0_yv1;
uint16_t sw_rawawb_exc_wp_region1_xu0;
uint16_t sw_rawawb_exc_wp_region1_xu1;
uint16_t sw_rawawb_exc_wp_region1_yv0;
uint16_t sw_rawawb_exc_wp_region1_yv1;
uint16_t sw_rawawb_exc_wp_region2_xu0;
uint16_t sw_rawawb_exc_wp_region2_xu1;
uint16_t sw_rawawb_exc_wp_region2_yv0;
uint16_t sw_rawawb_exc_wp_region2_yv1;
uint16_t sw_rawawb_exc_wp_region3_xu0;
uint16_t sw_rawawb_exc_wp_region3_xu1;
uint16_t sw_rawawb_exc_wp_region3_yv0;
uint16_t sw_rawawb_exc_wp_region3_yv1;
uint16_t sw_rawawb_exc_wp_region4_xu0;
uint16_t sw_rawawb_exc_wp_region4_xu1;
uint16_t sw_rawawb_exc_wp_region4_yv0;
uint16_t sw_rawawb_exc_wp_region4_yv1;
uint16_t sw_rawawb_exc_wp_region5_xu0;
uint16_t sw_rawawb_exc_wp_region5_xu1;
uint16_t sw_rawawb_exc_wp_region5_yv0;
uint16_t sw_rawawb_exc_wp_region5_yv1;
uint16_t sw_rawawb_exc_wp_region6_xu0;
uint16_t sw_rawawb_exc_wp_region6_xu1;
uint16_t sw_rawawb_exc_wp_region6_yv0;
uint16_t sw_rawawb_exc_wp_region6_yv1;
uint16_t sw_rawawb_rgb2ryuvmat0_u;
uint16_t sw_rawawb_rgb2ryuvmat1_u;
uint16_t sw_rawawb_rgb2ryuvmat2_u;
uint16_t sw_rawawb_rgb2ryuvofs_u;
uint16_t sw_rawawb_rgb2ryuvmat0_v;
uint16_t sw_rawawb_rgb2ryuvmat1_v;
uint16_t sw_rawawb_rgb2ryuvmat2_v;
uint16_t sw_rawawb_rgb2ryuvofs_v;
uint16_t sw_rawawb_rgb2ryuvmat0_y;
uint16_t sw_rawawb_rgb2ryuvmat1_y;
uint16_t sw_rawawb_rgb2ryuvmat2_y;
uint16_t sw_rawawb_rgb2ryuvofs_y;
uint16_t sw_rawawb_th0_ls0;
uint16_t sw_rawawb_th1_ls0;
uint16_t sw_rawawb_th2_ls0;
uint16_t sw_rawawb_th3_ls0;
uint16_t sw_rawawb_th4_ls0;
uint16_t sw_rawawb_th5_ls0;
uint16_t sw_rawawb_coor_x1_ls0_u;
uint16_t sw_rawawb_coor_x1_ls0_v;
uint16_t sw_rawawb_coor_x1_ls0_y;
uint16_t sw_rawawb_vec_x21_ls0_u;
uint16_t sw_rawawb_vec_x21_ls0_v;
uint16_t sw_rawawb_vec_x21_ls0_y;
uint16_t sw_rawawb_th0_ls1;
uint16_t sw_rawawb_th1_ls1;
uint16_t sw_rawawb_th2_ls1;
uint16_t sw_rawawb_th3_ls1;
uint16_t sw_rawawb_th4_ls1;
uint16_t sw_rawawb_th5_ls1;
uint16_t sw_rawawb_coor_x1_ls1_u;
uint16_t sw_rawawb_coor_x1_ls1_v;
uint16_t sw_rawawb_coor_x1_ls1_y;
uint16_t sw_rawawb_vec_x21_ls1_u;
uint16_t sw_rawawb_vec_x21_ls1_v;
uint16_t sw_rawawb_vec_x21_ls1_y;
uint16_t sw_rawawb_th0_ls2;
uint16_t sw_rawawb_th1_ls2;
uint16_t sw_rawawb_th2_ls2;
uint16_t sw_rawawb_th3_ls2;
uint16_t sw_rawawb_th4_ls2;
uint16_t sw_rawawb_th5_ls2;
uint16_t sw_rawawb_coor_x1_ls2_u;
uint16_t sw_rawawb_coor_x1_ls2_v;
uint16_t sw_rawawb_coor_x1_ls2_y;
uint16_t sw_rawawb_vec_x21_ls2_u;
uint16_t sw_rawawb_vec_x21_ls2_v;
uint16_t sw_rawawb_vec_x21_ls2_y;
uint16_t sw_rawawb_th0_ls3;
uint16_t sw_rawawb_th1_ls3;
uint16_t sw_rawawb_th2_ls3;
uint16_t sw_rawawb_th3_ls3;
uint16_t sw_rawawb_th4_ls3;
uint16_t sw_rawawb_th5_ls3;
uint16_t sw_rawawb_coor_x1_ls3_u;
uint16_t sw_rawawb_coor_x1_ls3_v;
uint16_t sw_rawawb_coor_x1_ls3_y;
uint16_t sw_rawawb_vec_x21_ls3_u;
uint16_t sw_rawawb_vec_x21_ls3_v;
uint16_t sw_rawawb_vec_x21_ls3_y;
uint32_t sw_rawawb_islope01_0;
uint32_t sw_rawawb_islope12_0;
uint32_t sw_rawawb_islope23_0;
uint32_t sw_rawawb_islope30_0;
uint32_t sw_rawawb_islope01_1;
uint32_t sw_rawawb_islope12_1;
uint32_t sw_rawawb_islope23_1;
uint32_t sw_rawawb_islope30_1;
uint32_t sw_rawawb_islope01_2;
uint32_t sw_rawawb_islope12_2;
uint32_t sw_rawawb_islope23_2;
uint32_t sw_rawawb_islope30_2;
uint32_t sw_rawawb_islope01_3;
uint32_t sw_rawawb_islope12_3;
uint32_t sw_rawawb_islope23_3;
uint32_t sw_rawawb_islope30_3;
uint32_t sw_rawawb_islope01_4;
uint32_t sw_rawawb_islope12_4;
uint32_t sw_rawawb_islope23_4;
uint32_t sw_rawawb_islope30_4;
uint32_t sw_rawawb_islope01_5;
uint32_t sw_rawawb_islope12_5;
uint32_t sw_rawawb_islope23_5;
uint32_t sw_rawawb_islope30_5;
uint32_t sw_rawawb_islope01_6;
uint32_t sw_rawawb_islope12_6;
uint32_t sw_rawawb_islope23_6;
uint32_t sw_rawawb_islope30_6;
} __attribute__((packed));
struct isp3x_rawawb_meas_stat
{
uint16_t ro_yhist_bin[ISP3X_RAWAWB_HSTBIN_NUM];
uint32_t ro_rawawb_sum_rgain_nor[ISP3X_RAWAWB_SUM_NUM];
uint32_t ro_rawawb_sum_bgain_nor[ISP3X_RAWAWB_SUM_NUM];
uint32_t ro_rawawb_wp_num_nor[ISP3X_RAWAWB_SUM_NUM];
uint32_t ro_rawawb_sum_rgain_big[ISP3X_RAWAWB_SUM_NUM];
uint32_t ro_rawawb_sum_bgain_big[ISP3X_RAWAWB_SUM_NUM];
uint32_t ro_rawawb_wp_num_big[ISP3X_RAWAWB_SUM_NUM];
uint32_t ro_wp_num2[ISP3X_RAWAWB_SUM_NUM];
uint32_t ro_sum_r_nor_multiwindow[ISP3X_RAWAWB_MULWD_NUM];
uint32_t ro_sum_b_nor_multiwindow[ISP3X_RAWAWB_MULWD_NUM];
uint32_t ro_wp_nm_nor_multiwindow[ISP3X_RAWAWB_MULWD_NUM];
uint32_t ro_sum_r_big_multiwindow[ISP3X_RAWAWB_MULWD_NUM];
uint32_t ro_sum_b_big_multiwindow[ISP3X_RAWAWB_MULWD_NUM];
uint32_t ro_wp_nm_big_multiwindow[ISP3X_RAWAWB_MULWD_NUM];
uint32_t ro_sum_r_exc[ISP3X_RAWAWB_EXCL_STAT_NUM];
uint32_t ro_sum_b_exc[ISP3X_RAWAWB_EXCL_STAT_NUM];
uint32_t ro_wp_nm_exc[ISP3X_RAWAWB_EXCL_STAT_NUM];
struct isp2x_rawawb_ramdata ramdata[ISP3X_RAWAWB_RAMDATA_NUM];
} __attribute__((packed));
struct isp3x_rawaf_curve
{
uint8_t ldg_lumth;
uint8_t ldg_gain;
uint16_t ldg_gslp;
} __attribute__((packed));
struct isp3x_rawaf_meas_cfg
{
uint8_t rawaf_sel;
uint8_t num_afm_win;
/* CTRL */
uint8_t gamma_en;
uint8_t gaus_en;
uint8_t v1_fir_sel;
uint8_t hiir_en;
uint8_t viir_en;
uint8_t accu_8bit_mode;
uint8_t ldg_en;
uint8_t h1_fv_mode;
uint8_t h2_fv_mode;
uint8_t v1_fv_mode;
uint8_t v2_fv_mode;
uint8_t ae_mode;
uint8_t y_mode;
/* WINA_B */
struct isp2x_window win[ISP3X_RAWAF_WIN_NUM];
/* INT_LINE */
uint8_t line_num[ISP3X_RAWAF_LINE_NUM];
uint8_t line_en[ISP3X_RAWAF_LINE_NUM];
/* THRES */
uint16_t afm_thres;
/* VAR_SHIFT */
uint8_t afm_var_shift[ISP3X_RAWAF_WIN_NUM];
uint8_t lum_var_shift[ISP3X_RAWAF_WIN_NUM];
/* HVIIR_VAR_SHIFT */
uint8_t h1iir_var_shift;
uint8_t h2iir_var_shift;
uint8_t v1iir_var_shift;
uint8_t v2iir_var_shift;
/* GAMMA_Y */
uint16_t gamma_y[ISP3X_RAWAF_GAMMA_NUM];
/* HIIR_THRESH */
uint16_t h_fv_thresh;
uint16_t v_fv_thresh;
struct isp3x_rawaf_curve curve_h[ISP3X_RAWAF_CURVE_NUM];
struct isp3x_rawaf_curve curve_v[ISP3X_RAWAF_CURVE_NUM];
int16_t h1iir1_coe[ISP3X_RAWAF_HIIR_COE_NUM];
int16_t h1iir2_coe[ISP3X_RAWAF_HIIR_COE_NUM];
int16_t h2iir1_coe[ISP3X_RAWAF_HIIR_COE_NUM];
int16_t h2iir2_coe[ISP3X_RAWAF_HIIR_COE_NUM];
int16_t v1iir_coe[ISP3X_RAWAF_V1IIR_COE_NUM];
int16_t v2iir_coe[ISP3X_RAWAF_V2IIR_COE_NUM];
int16_t v1fir_coe[ISP3X_RAWAF_VFIR_COE_NUM];
int16_t v2fir_coe[ISP3X_RAWAF_VFIR_COE_NUM];
uint16_t highlit_thresh;
} __attribute__((packed));
struct isp3x_rawaf_ramdata
{
uint32_t v1;
uint32_t v2;
uint32_t h1;
uint32_t h2;
} __attribute__((packed));
struct isp3x_rawaf_stat
{
uint32_t int_state;
uint32_t afm_sum_b;
uint32_t afm_lum_b;
uint32_t highlit_cnt_winb;
struct isp3x_rawaf_ramdata ramdata[ISP3X_RAWAF_SUMDATA_NUM];
} __attribute__((packed));
struct isp3x_cac_cfg
{
uint8_t bypass_en;
uint8_t center_en;
uint8_t psf_sft_bit;
uint16_t cfg_num;
uint16_t center_width;
uint16_t center_height;
uint16_t strength[ISP3X_CAC_STRENGTH_NUM];
uint32_t hsize;
uint32_t vsize;
int32_t buf_fd;
} __attribute__((packed));
struct isp3x_gain_cfg
{
uint32_t g0;
uint16_t g1;
uint16_t g2;
} __attribute__((packed));
struct isp3x_isp_other_cfg
{
struct isp21_bls_cfg bls_cfg;
struct isp2x_dpcc_cfg dpcc_cfg;
struct isp3x_lsc_cfg lsc_cfg;
struct isp21_awb_gain_cfg awb_gain_cfg;
struct isp21_gic_cfg gic_cfg;
struct isp2x_debayer_cfg debayer_cfg;
struct isp21_ccm_cfg ccm_cfg;
struct isp3x_gammaout_cfg gammaout_cfg;
struct isp2x_cproc_cfg cproc_cfg;
struct isp2x_ie_cfg ie_cfg;
struct isp2x_sdg_cfg sdg_cfg;
struct isp3x_drc_cfg drc_cfg;
struct isp3x_hdrmge_cfg hdrmge_cfg;
struct isp3x_dhaz_cfg dhaz_cfg;
struct isp2x_3dlut_cfg isp3dlut_cfg;
struct isp2x_ldch_cfg ldch_cfg;
struct isp3x_baynr_cfg baynr_cfg;
struct isp3x_bay3d_cfg bay3d_cfg;
struct isp3x_ynr_cfg ynr_cfg;
struct isp3x_cnr_cfg cnr_cfg;
struct isp3x_sharp_cfg sharp_cfg;
struct isp3x_cac_cfg cac_cfg;
struct isp3x_gain_cfg gain_cfg;
struct isp21_csm_cfg csm_cfg;
struct isp21_cgc_cfg cgc_cfg;
} __attribute__((packed));
struct isp3x_isp_meas_cfg
{
struct isp3x_rawaf_meas_cfg rawaf;
struct isp3x_rawawb_meas_cfg rawawb;
struct isp2x_rawaelite_meas_cfg rawae0;
struct isp2x_rawaebig_meas_cfg rawae1;
struct isp2x_rawaebig_meas_cfg rawae2;
struct isp2x_rawaebig_meas_cfg rawae3;
struct isp2x_rawhistlite_cfg rawhist0;
struct isp2x_rawhistbig_cfg rawhist1;
struct isp2x_rawhistbig_cfg rawhist2;
struct isp2x_rawhistbig_cfg rawhist3;
} __attribute__((packed));
struct isp3x_isp_params_cfg
{
uint64_t module_en_update;
uint64_t module_ens;
uint64_t module_cfg_update;
uint32_t frame_id;
struct isp3x_isp_meas_cfg meas;
struct isp3x_isp_other_cfg others;
} __attribute__((packed));
struct isp3x_stat
{
struct isp2x_rawaebig_stat rawae3;
struct isp2x_rawaebig_stat rawae1;
struct isp2x_rawaebig_stat rawae2;
struct isp2x_rawaelite_stat rawae0;
struct isp2x_rawhistbig_stat rawhist3;
struct isp2x_rawhistlite_stat rawhist0;
struct isp2x_rawhistbig_stat rawhist1;
struct isp2x_rawhistbig_stat rawhist2;
struct isp3x_rawaf_stat rawaf;
struct isp3x_rawawb_meas_stat rawawb;
struct isp3x_dhaz_stat dhaz;
struct isp2x_bls_stat bls;
} __attribute__((packed));
/**
* struct rkisp3x_isp_stat_buffer - Rockchip ISP3 Statistics Meta Data
*
* @meas_type: measurement types (ISP3X_STAT_ definitions)
* @frame_id: frame ID for sync
* @params: statistics data
*/
struct rkisp3x_isp_stat_buffer
{
uint32_t meas_type;
uint32_t frame_id;
struct isp3x_stat params;
} __attribute__((packed));
#endif /* _UAPI_RKISP3_CONFIG_H */
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