8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
133 lines
2.7 KiB
ArmAsm
133 lines
2.7 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Accelerated GHASH implementation with Intel PCLMULQDQ-NI
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* instructions. This file contains accelerated part of ghash
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* implementation. More information about PCLMULQDQ can be found at:
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*
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* http://software.intel.com/en-us/articles/carry-less-multiplication-and-its-usage-for-computing-the-gcm-mode/
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*
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* Copyright (c) 2009 Intel Corp.
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* Author: Huang Ying <ying.huang@intel.com>
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* Vinodh Gopal
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* Erdinc Ozturk
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* Deniz Karakoyunlu
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*/
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#include <linux/linkage.h>
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#include <asm/frame.h>
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.section .rodata.cst16.bswap_mask, "aM", @progbits, 16
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.align 16
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.Lbswap_mask:
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.octa 0x000102030405060708090a0b0c0d0e0f
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#define DATA %xmm0
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#define SHASH %xmm1
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#define T1 %xmm2
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#define T2 %xmm3
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#define T3 %xmm4
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#define BSWAP %xmm5
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#define IN1 %xmm6
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.text
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/*
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* __clmul_gf128mul_ble: internal ABI
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* input:
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* DATA: operand1
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* SHASH: operand2, hash_key << 1 mod poly
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* output:
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* DATA: operand1 * operand2 mod poly
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* changed:
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* T1
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* T2
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* T3
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*/
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SYM_FUNC_START_LOCAL(__clmul_gf128mul_ble)
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movaps DATA, T1
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pshufd $0b01001110, DATA, T2
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pshufd $0b01001110, SHASH, T3
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pxor DATA, T2
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pxor SHASH, T3
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pclmulqdq $0x00, SHASH, DATA # DATA = a0 * b0
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pclmulqdq $0x11, SHASH, T1 # T1 = a1 * b1
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pclmulqdq $0x00, T3, T2 # T2 = (a1 + a0) * (b1 + b0)
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pxor DATA, T2
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pxor T1, T2 # T2 = a0 * b1 + a1 * b0
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movaps T2, T3
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pslldq $8, T3
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psrldq $8, T2
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pxor T3, DATA
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pxor T2, T1 # <T1:DATA> is result of
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# carry-less multiplication
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# first phase of the reduction
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movaps DATA, T3
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psllq $1, T3
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pxor DATA, T3
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psllq $5, T3
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pxor DATA, T3
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psllq $57, T3
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movaps T3, T2
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pslldq $8, T2
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psrldq $8, T3
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pxor T2, DATA
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pxor T3, T1
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# second phase of the reduction
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movaps DATA, T2
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psrlq $5, T2
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pxor DATA, T2
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psrlq $1, T2
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pxor DATA, T2
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psrlq $1, T2
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pxor T2, T1
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pxor T1, DATA
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RET
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SYM_FUNC_END(__clmul_gf128mul_ble)
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/* void clmul_ghash_mul(char *dst, const u128 *shash) */
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SYM_FUNC_START(clmul_ghash_mul)
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FRAME_BEGIN
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movups (%rdi), DATA
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movups (%rsi), SHASH
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movaps .Lbswap_mask, BSWAP
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pshufb BSWAP, DATA
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call __clmul_gf128mul_ble
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pshufb BSWAP, DATA
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movups DATA, (%rdi)
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FRAME_END
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RET
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SYM_FUNC_END(clmul_ghash_mul)
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/*
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* void clmul_ghash_update(char *dst, const char *src, unsigned int srclen,
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* const u128 *shash);
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*/
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SYM_FUNC_START(clmul_ghash_update)
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FRAME_BEGIN
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cmp $16, %rdx
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jb .Lupdate_just_ret # check length
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movaps .Lbswap_mask, BSWAP
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movups (%rdi), DATA
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movups (%rcx), SHASH
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pshufb BSWAP, DATA
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.align 4
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.Lupdate_loop:
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movups (%rsi), IN1
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pshufb BSWAP, IN1
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pxor IN1, DATA
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call __clmul_gf128mul_ble
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sub $16, %rdx
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add $16, %rsi
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cmp $16, %rdx
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jge .Lupdate_loop
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pshufb BSWAP, DATA
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movups DATA, (%rdi)
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.Lupdate_just_ret:
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FRAME_END
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RET
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SYM_FUNC_END(clmul_ghash_update)
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