8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
149 lines
3.1 KiB
C
149 lines
3.1 KiB
C
/**
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* Copyright (c) 2022 Rockchip Electronic Co.,Ltd
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*
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* SPDX-License-Identifier: Apache-2.0
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******************************************************************************
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* @file timer.c
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* @author Jason Zhu
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* @version V0.1
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* @date 11-Jan-2022
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* @brief
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*
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******************************************************************************
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*/
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#include <rtthread.h>
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#include "timer.h"
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#include "riscv_csr_encoding.h"
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static struct timer_cmp_t timer_cmp;
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/* REG ADDR DEF end */
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#define word32 *(volatile unsigned int *)
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#define word16 *(volatile unsigned short *)
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#define word8 *(volatile unsigned char *)
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static void _reset_mtime()
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{
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word32(CTIMER_BASE + CTIMER_MTIME) = 0x00;
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word32(CTIMER_BASE + CTIMER_MTIMEH) = 0x00;
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}
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static void _reset_mtimecmp()
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{
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word32(CTIMER_BASE + CTIMER_MTIMECMP) = 0x00;
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word32(CTIMER_BASE + CTIMER_MTIMECMPH) = 0x00;
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}
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static void _write_mtime_ctrl(unsigned int t)
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{
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word32(CTIMER_BASE + CTIMER_MTIME_CTRL) = t;
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}
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static void _write_mtime_div(unsigned int t)
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{
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word32(CTIMER_BASE + CTIMER_MTIME_DIV) = t;
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}
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static void _write_mtimecmp(unsigned int t)
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{
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word32(CTIMER_BASE + CTIMER_MTIMECMP) = t;
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}
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static void _write_mtimecmph(unsigned int t)
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{
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word32(CTIMER_BASE + CTIMER_MTIMECMPH) = t;
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}
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static void _write_mtime(unsigned int t)
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{
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word32(CTIMER_BASE + CTIMER_MTIME) = t;
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}
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static void _write_mtimeh(unsigned int t)
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{
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word32(CTIMER_BASE + CTIMER_MTIMEH) = t;
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}
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static unsigned int _read_mtimecmp()
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{
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return word32(CTIMER_BASE + CTIMER_MTIMECMP);
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}
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static unsigned int _read_mtimecmph()
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{
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return word32(CTIMER_BASE + CTIMER_MTIMECMPH);
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}
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static unsigned int _read_mtime()
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{
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return word32(CTIMER_BASE + CTIMER_MTIME);
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}
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static unsigned int _read_mtimeh()
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{
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return word32(CTIMER_BASE + CTIMER_MTIMEH);
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}
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static unsigned int _read_mtime_ctrl()
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{
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return word32(CTIMER_BASE + CTIMER_MTIME_CTRL);
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}
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static unsigned int _read_mtime_div()
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{
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return word32(CTIMER_BASE + CTIMER_MTIME_DIV);
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}
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static void _run_timer()
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{
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unsigned int temp;
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temp = word32(CTIMER_BASE + CTIMER_MTIME_CTRL);
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temp |= (1 << SCR1_MTIME_CTRL_EN);
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word32(CTIMER_BASE + CTIMER_MTIME_CTRL) = temp;
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}
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static void _stop_timer()
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{
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unsigned int temp;
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temp = word32(CTIMER_BASE + CTIMER_MTIME_CTRL);
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temp &= (~(1 << SCR1_MTIME_CTRL_EN));
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word32(CTIMER_BASE + CTIMER_MTIME_CTRL) = temp;
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}
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void sysTick_stop(void)
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{
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_stop_timer();
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}
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void _update_timer(void)
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{
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clear_csr(mie, MIP_MTIP);
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_write_mtimecmp(-1);
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_write_mtimecmph(0);
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timer_cmp.time_cmp += timer_cmp.step;
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_write_mtimecmp(timer_cmp.time_cmp);
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if (_read_mtimeh() > timer_cmp.time_cmph)
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{
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timer_cmp.time_cmph + 1;
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_write_mtimecmph(timer_cmp.time_cmph);
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}
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set_csr(mie, MIP_MTIP);
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}
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void sysTick_config(unsigned int ticks)
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{
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_stop_timer();
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_reset_mtime();
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_reset_mtimecmp();
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_write_mtime_div(SCR1_SYS_TIMER_DIV);
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_write_mtimecmp(ticks / SCR1_SYS_TIMER_DIV);
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timer_cmp.time_cmp = ticks / SCR1_SYS_TIMER_DIV;
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timer_cmp.time_cmph = 0;
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timer_cmp.step = ticks / SCR1_SYS_TIMER_DIV;
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set_csr(mie, MIP_MTIP);
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_run_timer();
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}
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