8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
226 lines
5.9 KiB
ArmAsm
Executable File
226 lines
5.9 KiB
ArmAsm
Executable File
/*
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* File : context_gcc.S
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2011-12-17 nl1031 first implementation for MicroBlaze.
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*
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*/
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#include "microblaze.inc"
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.text
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.globl rt_interrupt_enter
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.globl rt_interrupt_leave
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/*
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* rt_base_t rt_hw_interrupt_disable()
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* copy from ucos-ii
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*/
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.globl rt_hw_interrupt_disable
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.ent rt_hw_interrupt_disable
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.align 2
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rt_hw_interrupt_disable:
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ADDIK r1, r1, -4
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SW r4, r1, r0
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MFS r3, RMSR
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ANDNI r4, r3, IE_BIT
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MTS RMSR, r4
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LW r4, r1, r0
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ADDIK r1, r1, 4
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AND r0, r0, r0 /* NO-OP - pipeline flush */
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AND r0, r0, r0 /* NO-OP - pipeline flush */
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AND r0, r0, r0 /* NO-OP - pipeline flush */
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RTSD r15, 8
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AND r0, r0, r0
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.end rt_hw_interrupt_disable
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/*
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* void rt_hw_interrupt_enable(rt_base_t level)
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* copy from ucos-ii
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*/
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.globl rt_hw_interrupt_enable
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.ent rt_hw_interrupt_enable
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.align 2
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rt_hw_interrupt_enable:
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RTSD r15, 8
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MTS rMSR, r5 /* Move the saved status from r5 into rMSR */
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.end rt_hw_interrupt_enable
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/*
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* void rt_hw_context_switch(rt_uint32 from, rt_uint32 to)
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* r5 --> from
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* r6 --> to
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*/
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.globl rt_interrupt_from_thread
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.globl rt_interrupt_to_thread
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.globl rt_hw_context_switch
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.ent rt_hw_context_switch
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.align 2
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rt_hw_context_switch:
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PUSH_ALL
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MFS r3, RMSR /* save the MSR */
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SWI r3, r1, STACK_RMSR
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SWI r1, r5, 0 /* store sp in preempted tasks TCB */
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LWI r1, r6, 0 /* get new task stack pointer */
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LWI r3, r1, STACK_RMSR
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ANDI r3, r3, IE_BIT
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BNEI r3, rt_hw_context_switch_ie /*if IE bit set,should be use RTID (return from interrupt). */
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LWI r3, r1, STACK_RMSR
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MTS RMSR,r3
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POP_ALL
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ADDIK r1, r1, STACK_SIZE
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RTSD r15, 8
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AND r0, r0, r0
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rt_hw_context_switch_ie:
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LWI r3, r1, STACK_RMSR
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ANDNI r3, r3, IE_BIT /* clear IE bit, prevent interrupt occur immediately*/
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MTS RMSR,r3
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LWI r3, r1, STACK_R03
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POP_ALL
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ADDIK r1, r1, STACK_SIZE
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RTID r14, 0 /* IE bit will be set automatically */
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AND r0, r0, r0
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.end rt_hw_context_switch
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/*
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* void rt_hw_context_switch_to(rt_uint32 to)
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* r5 --> to
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*/
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.globl rt_hw_context_switch_to
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.ent rt_hw_context_switch_to
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.align 2
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rt_hw_context_switch_to:
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LWI r1, r5, 0 /* get new task stack pointer */
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LWI r3, r1, STACK_RMSR
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ANDNI r3, r3, IE_BIT /* clear IE bit, prevent interrupt occur immediately*/
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MTS RMSR,r3
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POP_ALL
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ADDIK r1, r1, STACK_SIZE
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RTID r14, 0 /* IE bit will be set automatically */
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AND r0, r0, r0
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.end rt_hw_context_switch_to
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/*
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* void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to)
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*/
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.globl rt_thread_switch_interrupt_flag
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.globl rt_hw_context_switch_interrupt
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.ent rt_hw_context_switch_interrupt
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.align 2
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rt_hw_context_switch_interrupt:
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LA r3, r0, rt_thread_switch_interrupt_flag
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LWI r4, r3, 0 /* load rt_thread_switch_interrupt_flag into r4 */
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ANDI r4, r4, 1
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BNEI r4, _reswitch /* if rt_thread_switch_interrupt_flag = 1 */
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ADDIK r4, r0, 1 /* set rt_thread_switch_interrupt_flag to 1 */
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SWI r4, r3, 0
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LA r3, r0, rt_interrupt_from_thread /* set rt_interrupt_from_thread */
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SWI r5, r3, 0 /* rt_interrupt_from_thread = from */
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_reswitch:
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LA r3, r0, rt_interrupt_to_thread /* set rt_interrupt_to_thread */
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SWI r6, r3, 0 /* rt_interrupt_to_thread = to */
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RTSD r15, 8
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AND r0, r0, r0
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.end rt_hw_context_switch_interrupt
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.globl _interrupt_handler
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.section .text
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.align 2
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.ent _interrupt_handler
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.type _interrupt_handler, @function
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_interrupt_handler:
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PUSH_ALL
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MFS r3, RMSR
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ORI r3, r3, IE_BIT
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SWI r3, r1, STACK_RMSR /* push MSR */
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BRLID r15, rt_interrupt_enter
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AND r0, r0, r0
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BRLID r15, rt_hw_trap_irq
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AND r0, r0, r0
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BRLID r15, rt_interrupt_leave
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AND r0, r0, r0
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/*
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* if rt_thread_switch_interrupt_flag set, jump to
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* rt_hw_context_switch_interrupt_do and don't return
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*/
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LA r3, r0, rt_thread_switch_interrupt_flag
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LWI r4, r3, 0
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ANDI r4, r4, 1
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BNEI r4, rt_hw_context_switch_interrupt_do
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LWI r3, r1, STACK_RMSR
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ANDNI r3, r3, IE_BIT
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MTS RMSR,r3
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POP_ALL
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ADDIK r1, r1, STACK_SIZE
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RTID r14, 0
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AND r0, r0, r0
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/*
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* void rt_hw_context_switch_interrupt_do(rt_base_t flag)
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*/
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rt_hw_context_switch_interrupt_do:
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SWI r0, r3, 0 /* clear rt_thread_switch_interrupt_flag */
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LA r3, r0, rt_interrupt_from_thread
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LW r4, r0, r3
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SWI r1, r4, 0 /* store sp in preempted tasks's TCB */
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LA r3, r0, rt_interrupt_to_thread
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LW r4, r0, r3
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LWI r1, r4, 0 /* get new task's stack pointer */
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LWI r3, r1, STACK_RMSR
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ANDI r3, r3, IE_BIT
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BNEI r3, return_with_ie /*if IE bit set,should be use RTID (return from interrupt). */
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LWI r3, r1, STACK_RMSR
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MTS RMSR,r3
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POP_ALL
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ADDIK r1, r1, STACK_SIZE
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RTSD r15, 8
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AND r0, r0, r0
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return_with_ie:
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LWI r3, r1, STACK_RMSR
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ANDNI r3, r3, IE_BIT /* clear IE bit, prevent interrupt occur immediately*/
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MTS RMSR,r3
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LWI r3, r1, STACK_R03
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POP_ALL
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ADDIK r1, r1, STACK_SIZE
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RTID r14, 0 /* IE bit will be set automatically */
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AND r0, r0, r0
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.end _interrupt_handler
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