8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
120 lines
5.0 KiB
C
120 lines
5.0 KiB
C
/*
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* Copyright (c) 2015 iComm-semi Ltd.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _SSV_HCI_H_
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#define _SSV_HCI_H_
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// #define STA_TXQ_NUM (9)
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#define STA_TXQ_NUM (NX_REMOTE_STA_MAX)
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/**
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* The number of software TX queue. The
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* higher queue value has the higher priority.
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* (STA0....STAn) (WIFI_MNG) (BLE_PDU) (WIFI_CMD)
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*/
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#define SSV_SW_STA_TXQ_NUM (STA_TXQ_NUM)
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#define SSV_SW_WIFI_MNG_TXQ_NUM (2)
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#define SSV_SW_WIFI_CMD_TXQ_NUM (1)
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#define SSV_SW_BLE_PDU_TXQ_NUM (1)
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#define SSV_SW_TXQ_NUM (SSV_SW_STA_TXQ_NUM+SSV_SW_BLE_PDU_TXQ_NUM+SSV_SW_WIFI_MNG_TXQ_NUM+SSV_SW_WIFI_CMD_TXQ_NUM)
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#define SSV_SW_TXQ_ID_MNG0 (SSV_SW_TXQ_NUM-4) // for host drv_vif_index = 0
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#define SSV_SW_TXQ_ID_MNG1 (SSV_SW_TXQ_NUM-3) // for host drv_vif_index = 1
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#define SSV_SW_TXQ_ID_BLE_PDU (SSV_SW_TXQ_NUM-2)
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#define SSV_SW_TXQ_ID_WIFI_CMD (SSV_SW_TXQ_NUM-1)
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#define SSV_SW_TXQ_ID_STAMAX (SSV_SW_STA_TXQ_NUM-1)
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#define SSV_SW_TXQ_ID_MNGMAX SSV_SW_TXQ_ID_MNG1
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#define MAX_RX_CB_NUM 5
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typedef int (*proc_rx_cb)(void *app_param, struct sk_buff *skb);
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enum ssv_hci_cap {
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HCI_CAP_TX_AGGR = 0,
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HCI_CAP_RX_AGGR = 1,
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HCI_CAP_MAX_NUM = 32, // limited by u32 hci_cap in struct ssv6xxx_hci_ctrl
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};
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/* struct hci_rx_aggr_info - HCI RX Aggregation Format description */
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struct hci_rx_aggr_info {
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u32 jmp_mpdu_len : 16,
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jmp_mpdu_len1: 16;
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u32 extra_info;
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};
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/**
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* struct ssv_hci_ops - the interface between ssv hci and upper driver.
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*
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*/
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struct ssv6xxx_hci_ops {
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/* public operation */
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int (*hci_start)(void* hci_priv);
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int (*hci_stop)(void* hci_priv);
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int (*hci_ble_start)(void* hci_priv);
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int (*hci_ble_stop)(void* hci_priv);
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int (*hci_read_word)(void* hci_priv, u32 addr, u32 *regval);
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int (*hci_write_word)(void* hci_priv, u32 addr, u32 regval);
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void (*hci_trigger_tx)(void* hci_priv);
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int (*hci_tx)(void* hci_priv, struct sk_buff *, int, bool, u32);
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void (*hci_tx_pause_by_sta)(void* hci_priv, int txqid);
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void (*hci_tx_resume_by_sta)(void* hci_priv, int txqid);
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void (*hci_tx_pause_by_txqid)(void* hci_priv, int txqid);
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void (*hci_tx_resume_by_txqid)(void* hci_priv, int txqid);
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void (*hci_tx_active_by_sta)(void* hci_priv, int txqid);
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void (*hci_tx_inactive_by_sta)(void* hci_priv, int txqid);
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void (*hci_tx_active_by_txqid)(void* hci_priv, int txqid);
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void (*hci_tx_inactive_by_txqid)(void* hci_priv, int txqid);
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int (*hci_ble_txq_flush)(void* hci_priv);
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int (*hci_txq_flush_by_sta)(void* hci_priv, int aid);
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void (*hci_txq_lock_by_sta)(void* hci_priv, int txqid);
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void (*hci_txq_unlock_by_sta)(void* hci_priv, int txqid);
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/**
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* Function provided for query of queue status by upper layer. The
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* parameter maybe one of
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* @ NULL : indicate all queues
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* @ non-NULL: indicate the specify queue
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*/
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int (*hci_txq_len)(void* hci_priv);
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bool (*hci_txq_empty)(void* hci_priv, int txqid);
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int (*hci_set_cap)(void* hci_priv, enum ssv_hci_cap cap, bool enable);
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void (*hci_set_trigger_conf)(void* hci_priv, bool en, u32 qlen);
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void (*hci_set_tx_timestamp)(void* hci_priv, u32 timestamp);
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void (*hci_get_tx_timestamp)(void* hci_priv, u32 *timestamp);
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int (*hci_rx_enqueue)(void* hci_priv, struct sk_buff *skb, bool is_tail);
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/* for debug operation */
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void (*hci_txq_st)(void* hci_priv, int txqid, bool *inactive, bool *paused, int *locked, u32 *qsize, u32 *pkt_cnt);
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void (*hci_rxq_st)(void* hci_priv, u32 *qsize, u32 *pkt_cnt, u32 *post_rx_cnt);
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/* for fw reset operation */
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void (*fw_reset)(void* hci_priv);
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};
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extern struct ssv6xxx_hci_ops ssv_hci_ops;
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int ssv6xxx_hci_deinit(void *hci_priv);
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int ssv6xxx_hci_init(void **hci_priv,void* hwif_priv,struct device *dev);
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int ssv6xxx_hci_post_tx_register(void* hci_priv, void (*hci_post_tx_cb)(struct sk_buff *, void *), void *args);
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int ssv6xxx_check_resource_register(void* hci_priv,
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int (*check_resource_cb)(void *app_param, struct sk_buff_head *qhead, int reserved_page ,int *p_max_count),
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void *args);
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int ssv6xxx_hci_proc_rx_register(void* hci_priv,proc_rx_cb rx_cb, void *args);
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int ssv6xxx_hci_proc_rx_unregister(void* hci_priv,proc_rx_cb rx_cb, void *args);
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#endif /* _SSV_HCI_H_ */
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