luckfox-pico-sdk/sysdrv/source/mcu/rt-thread/bsp/rockchip/common/HalSConscript
luckfox-eng29 8f34c2760d project:build.sh: Added fastboot support; custom modifications to U-Boot and kernel implemented using patches.
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between
the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door
for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more
usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp:
Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for
compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem.
sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device
tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately.
sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick
boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades.
sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for
fastboot.

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
2024-10-14 09:47:04 +08:00

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import rtconfig
Import('RTT_ROOT')
Import('PROJECT')
from building import *
# get current directory
cwd = GetCurrentDir()
hal_lib = cwd + '/hal/lib'
if PROJECT == 'CA':
Import('SOC')
# The set of source files associated with this SConscript file.
src = Glob(hal_lib + '/CMSIS/Device/' + SOC + '/Source/Templates/*.c')
src += Glob(hal_lib + '/hal/src/*.c')
src += Glob(hal_lib + '/hal/src/*/*.c')
src += Glob(hal_lib + '/bsp/' + SOC + '/*.c')
#add include path
path = [hal_lib + '/hal/inc',
hal_lib + '/bsp/' + SOC,
hal_lib + '/CMSIS/Device/' + SOC + '/Include']
else:
# The set of source files associated with this SConscript file.
src = Glob(hal_lib + '/CMSIS/Device/' + PROJECT + '/Source/Templates/*.c')
src += Glob(hal_lib + '/hal/src/*.c')
src += Glob(hal_lib + '/hal/src/*/*.c')
src += Glob(hal_lib + '/bsp/' + PROJECT + '/*.c')
#add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
src += Glob(hal_lib + '/CMSIS/Device/' + PROJECT + '/Source/Templates/GCC/*.S')
elif rtconfig.CROSS_TOOL == 'keil':
src += Glob(hal_lib + '/CMSIS/Device/' + PROJECT + '/Source/Templates/ARM/*.s')
elif rtconfig.CROSS_TOOL == 'iar':
src += Glob(hal_lib + '/CMSIS/Device/' + PROJECT + '/Source/Templates/IAR/*.s')
src = src + [hal_lib + '/hal/src/pm/hal_cpu_sleep.S']
#add include path
path = [hal_lib + '/hal/inc',
hal_lib + '/bsp/' + PROJECT,
hal_lib + '/CMSIS/Device',
hal_lib + '/CMSIS/Device/' + PROJECT + '/Include']
if rtconfig.ARCH == 'arm':
if PROJECT == 'CA':
path.append(hal_lib + '/CMSIS/Core_A/Include')
else:
path.append(hal_lib + '/CMSIS/Core/Include')
elif rtconfig.ARCH == 'risc-v':
path.append(hal_lib + '/CMSIS/RISCV/Include')
else:
print('you must defined ARCH!!!')
group = DefineGroup(PROJECT + '_StdPeriph', src, depend = [''], CPPPATH = path)
Return('group')