luckfox-pico-sdk/sysdrv/source/mcu/rt-thread/bsp/rockchip/common/drivers/spi2apb.h
luckfox-eng29 8f34c2760d project:build.sh: Added fastboot support; custom modifications to U-Boot and kernel implemented using patches.
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between
the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door
for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more
usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp:
Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for
compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem.
sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device
tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately.
sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick
boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades.
sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for
fastboot.

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
2024-10-14 09:47:04 +08:00

78 lines
1.9 KiB
C

/**
* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
*
* SPDX-License-Identifier: BSD-3-Clause
******************************************************************************
* @file spi2apb.h
* @author David Wu
* @version V0.1
* @date 20-Mar-2019
* @brief spi2apb driver for pisces
*
******************************************************************************
*/
#ifndef __DRV_SPI2APB_H__
#define __DRV_SPI2APB_H__
#include <stdlib.h>
#include <rtthread.h>
#include "hal_base.h"
#ifdef __cplusplus
extern "C" {
#endif
/* ctrl */
#define RT_DEVICE_CTRL_SPI2APB_CONFIGURATION (1)
#define RT_DEVICE_CTRL_SPI2APB_QUERY_STATUS (2)
#define RT_DEVICE_CTRL_SPI2APB_REGISTER_CB (3)
#define RT_DEVICE_CTRL_SPI2APB_READ_REG0 (4)
#define RT_DEVICE_CTRL_SPI2APB_READ_REG1 (5)
#define RT_DEVICE_CTRL_SPI2APB_WRITE_REG2 (6)
/* configuratin */
#define RT_CONFIG_SPI2APB_LSB SPI2APB_LSB
#define RT_CONFIG_SPI2APB_MSB SPI2APB_MSB
#define RT_CONFIG_SPI2APB_BIG_ENDIAN SPI2APB_BIG_ENDIAN
#define RT_CONFIG_SPI2APB_LITTLE_ENDIAN SPI2APB_LITTLE_ENDIAN
#define RT_CONFIG_SPI2APB_RXCP SPI2APB_RXCP
#define RT_CONFIG_SPI2APB_RXCP_INVERT SPI2APB_RXCP_INVERT
#define RT_CONFIG_SPI2APB_TXCP SPI2APB_TXCP
#define RT_CONFIG_SPI2APB_TXCP_INVERT SPI2APB_TXCP_INVERT
/* state */
#define RT_STATE_SPI2APB_BUSY SPI2APB_BUSY
#define RT_STATE_SPI2APB_TX_FULL SPI2APB_TX_FULL
#define RT_STATE_SPI2APB_TX_EMPTY SPI2APB_TX_EMPTY
#define RT_STATE_SPI2APB_RX_FULL SPI2APB_RX_FULL
#define RT_STATE_SPI2APB_RX_EMPTY SPI2APB_RX_EMPTY
typedef void (*spi2apb_callback)(rt_uint32_t cparam);
/**
* SPI2APB configuration structure
*/
struct rt_spi2apb_configuration
{
rt_uint8_t mode;
rt_uint8_t clock_polarity;
};
/**
* SPI2APB device structure
*/
struct rt_spi2apb_device
{
struct rt_device parent;
struct rt_spi2apb_configuration config;
};
#ifdef __cplusplus
}
#endif
#endif