project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
78 lines
1.9 KiB
C
78 lines
1.9 KiB
C
/**
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* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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* @file spi2apb.h
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* @author David Wu
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* @version V0.1
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* @date 20-Mar-2019
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* @brief spi2apb driver for pisces
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*
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******************************************************************************
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*/
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#ifndef __DRV_SPI2APB_H__
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#define __DRV_SPI2APB_H__
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#include <stdlib.h>
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#include <rtthread.h>
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#include "hal_base.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* ctrl */
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#define RT_DEVICE_CTRL_SPI2APB_CONFIGURATION (1)
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#define RT_DEVICE_CTRL_SPI2APB_QUERY_STATUS (2)
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#define RT_DEVICE_CTRL_SPI2APB_REGISTER_CB (3)
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#define RT_DEVICE_CTRL_SPI2APB_READ_REG0 (4)
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#define RT_DEVICE_CTRL_SPI2APB_READ_REG1 (5)
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#define RT_DEVICE_CTRL_SPI2APB_WRITE_REG2 (6)
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/* configuratin */
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#define RT_CONFIG_SPI2APB_LSB SPI2APB_LSB
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#define RT_CONFIG_SPI2APB_MSB SPI2APB_MSB
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#define RT_CONFIG_SPI2APB_BIG_ENDIAN SPI2APB_BIG_ENDIAN
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#define RT_CONFIG_SPI2APB_LITTLE_ENDIAN SPI2APB_LITTLE_ENDIAN
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#define RT_CONFIG_SPI2APB_RXCP SPI2APB_RXCP
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#define RT_CONFIG_SPI2APB_RXCP_INVERT SPI2APB_RXCP_INVERT
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#define RT_CONFIG_SPI2APB_TXCP SPI2APB_TXCP
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#define RT_CONFIG_SPI2APB_TXCP_INVERT SPI2APB_TXCP_INVERT
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/* state */
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#define RT_STATE_SPI2APB_BUSY SPI2APB_BUSY
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#define RT_STATE_SPI2APB_TX_FULL SPI2APB_TX_FULL
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#define RT_STATE_SPI2APB_TX_EMPTY SPI2APB_TX_EMPTY
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#define RT_STATE_SPI2APB_RX_FULL SPI2APB_RX_FULL
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#define RT_STATE_SPI2APB_RX_EMPTY SPI2APB_RX_EMPTY
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typedef void (*spi2apb_callback)(rt_uint32_t cparam);
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/**
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* SPI2APB configuration structure
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*/
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struct rt_spi2apb_configuration
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{
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rt_uint8_t mode;
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rt_uint8_t clock_polarity;
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};
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/**
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* SPI2APB device structure
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*/
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struct rt_spi2apb_device
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{
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struct rt_device parent;
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struct rt_spi2apb_configuration config;
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};
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#ifdef __cplusplus
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}
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#endif
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#endif |