8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
119 lines
1.6 KiB
C
119 lines
1.6 KiB
C
/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2006-09-06 XuXinming first version
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*/
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#include <rtthread.h>
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#include "s3c44b0.h"
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/**
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* @addtogroup S3C44B0
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*/
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/*@{*/
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/**
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* This function will enable I-Cache of CPU
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*
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*/
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void rt_hw_cpu_icache_enable()
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{
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rt_base_t reg;
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volatile int i;
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/* flush cycle */
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for(i = 0x10002000; i < 0x10004800; i+=16)
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{
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*((int *)i)=0x0;
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}
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/*
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* Init cache
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* Non-cacheable area (everything outside RAM)
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* 0x0000:0000 - 0x0C00:0000
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*/
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NCACHBE0 = 0xC0000000;
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NCACHBE1 = 0x00000000;
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/*
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Enable chache
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*/
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reg = SYSCFG;
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reg |= 0x00000006; /* 8kB */
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SYSCFG = reg;
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}
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/**
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* This function will disable I-Cache of CPU
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*
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*/
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void rt_hw_cpu_icache_disable()
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{
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rt_base_t reg;
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reg = SYSCFG;
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reg &= ~0x00000006; /* 8kB */
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SYSCFG = reg;
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}
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/**
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* this function will get the status of I-Cache
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*
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*/
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rt_base_t rt_hw_cpu_icache_status()
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{
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return 0;
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}
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/**
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* this function will enable D-Cache of CPU
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*
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*/
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void rt_hw_cpu_dcache_enable()
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{
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rt_hw_cpu_icache_enable();
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}
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/**
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* this function will disable D-Cache of CPU
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*
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*/
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void rt_hw_cpu_dcache_disable()
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{
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rt_hw_cpu_icache_disable();
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}
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/**
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* this function will get the status of D-Cache
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*
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*/
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rt_base_t rt_hw_cpu_dcache_status()
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{
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return rt_hw_cpu_icache_status();
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}
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/**
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* this function will reset CPU
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*
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*/
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void rt_hw_cpu_reset()
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{
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}
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/**
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* this function will shutdown CPU
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*
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*/
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void rt_hw_cpu_shutdown()
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{
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rt_kprintf("shutdown...\n");
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while (1);
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}
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/*@}*/
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