8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
109 lines
1.8 KiB
C
109 lines
1.8 KiB
C
/*
|
|
* Copyright (c) 2006-2018, RT-Thread Development Team
|
|
*
|
|
* SPDX-License-Identifier: Apache-2.0
|
|
*
|
|
* Change Logs:
|
|
* Date Author Notes
|
|
* 2010-03-20 zchong first version
|
|
*/
|
|
|
|
#include <rtthread.h>
|
|
#include "sep4020.h"
|
|
|
|
#define CLK_IN 4000000 /* Fin = 4.00MHz */
|
|
#define SYSCLK 72000000 /* system clock we want */
|
|
|
|
#define CLK_ESRAM 0
|
|
#define CLK_LCDC 1
|
|
#define CLK_PWM 2
|
|
#define CLK_DMAC 3
|
|
#define CLK_EMI 4
|
|
#define CLK_MMCSD 5
|
|
#define CLK_SSI 7
|
|
#define CLK_UART0 8
|
|
#define CLK_UART1 9
|
|
#define CLK_UART2 10
|
|
#define CLK_UART3 11
|
|
#define CLK_USB 12
|
|
#define CLK_MAC 13
|
|
#define CLK_SMC 14
|
|
#define CLK_I2C 15
|
|
#define CLK_GPT 16
|
|
|
|
static void rt_hw_set_system_clock(void)
|
|
{
|
|
rt_uint8_t pv;
|
|
|
|
/* pv value*/
|
|
pv = SYSCLK/2/CLK_IN;
|
|
/* go to normal mode*/
|
|
*(RP)PMU_PMDR = 0x01;
|
|
/* set the clock */
|
|
*(RP)PMU_PMCR = 0x4000 | pv;
|
|
/* trige configurate*/
|
|
*(RP)PMU_PMCR = 0xc000 | pv;
|
|
}
|
|
|
|
static void rt_hw_set_usb_clock(void)
|
|
{
|
|
/* set the clock */
|
|
*(RP)PMU_PUCR = 0x000c;
|
|
/* trige configurate*/
|
|
*(RP)PMU_PMCR = 0x800c;
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief System Clock Configuration
|
|
*/
|
|
void rt_hw_clock_init(void)
|
|
{
|
|
/* set system clock */
|
|
rt_hw_set_system_clock();
|
|
/* set usb clock */
|
|
rt_hw_set_usb_clock();
|
|
}
|
|
|
|
/**
|
|
* @brief Get system clock
|
|
*/
|
|
rt_uint32_t rt_hw_get_clock(void)
|
|
{
|
|
rt_uint32_t val;
|
|
rt_uint8_t pv, pd, npd;
|
|
|
|
/* get PMCR value */
|
|
val =*(RP) PMU_PMCR;
|
|
/* get NPD */
|
|
npd = (val >> 14) & 0x01;
|
|
/* get PD */
|
|
pd = (val >> 10) & 0x0f;
|
|
/* get PV */
|
|
pv = val & 0x7f;
|
|
/* caculate the system clock */
|
|
if(npd)
|
|
val = 2 * CLK_IN * pv;
|
|
else
|
|
val = CLK_IN * pv / (pd + 1);
|
|
|
|
return(val);
|
|
}
|
|
|
|
/**
|
|
* @brief Enable module clock
|
|
*/
|
|
void rt_hw_enable_module_clock(rt_uint8_t module)
|
|
{
|
|
|
|
}
|
|
|
|
/**
|
|
* @brief Disable module clock
|
|
*/
|
|
void rt_hw_disable_module_clock(rt_uint8_t module)
|
|
{
|
|
|
|
}
|
|
|