8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
91 lines
2.4 KiB
C
91 lines
2.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2023 Rockchip Electronics Co., Ltd
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*
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*/
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#ifndef __CONFIG_RK3576_COMMON_H
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#define __CONFIG_RK3576_COMMON_H
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#include "rockchip-common.h"
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#define CONFIG_SPL_FRAMEWORK
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#define CONFIG_SPL_TEXT_BASE 0x40000000
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#define CONFIG_SPL_MAX_SIZE 0x00040000
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#define CONFIG_SPL_BSS_START_ADDR 0x43fe0000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x00010000
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#define CONFIG_SPL_STACK 0x43fe0000
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#ifdef CONFIG_SPL_LOAD_FIT_ADDRESS
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#undef CONFIG_SPL_LOAD_FIT_ADDRESS
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#endif
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#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x42000000
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#define CONFIG_SYS_MALLOC_LEN (32 << 20)
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#define CONFIG_SYS_CBSIZE 1024
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#ifdef CONFIG_SUPPORT_USBPLUG
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#define CONFIG_SYS_TEXT_BASE 0x40000000
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#else
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#define CONFIG_SYS_TEXT_BASE 0x40200000
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#endif
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#define CONFIG_SYS_INIT_SP_ADDR 0x40400000
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#define CONFIG_SYS_LOAD_ADDR 0x40700800
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#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
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#define COUNTER_FREQUENCY 24000000
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#define GICD_BASE 0x2a701000
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#define GICC_BASE 0x2a702000
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/* secure otp */
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#define OTP_UBOOT_ROLLBACK_OFFSET 0x610
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#define OTP_UBOOT_ROLLBACK_WORDS 2 /* 64 bits, 2 words */
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#define OTP_ALL_ONES_NUM_BITS 32
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#define OTP_SECURE_BOOT_ENABLE_ADDR 0x20
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#define OTP_SECURE_BOOT_ENABLE_SIZE 1
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#define OTP_RSA4096_ENABLE_ADDR 0x21
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#define OTP_RSA4096_ENABLE_SIZE 1
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#define OTP_RSA_HASH_ADDR 0x200
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#define OTP_RSA_HASH_SIZE 32
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define SDRAM_MAX_SIZE (0x100000000 - CONFIG_SYS_SDRAM_BASE) /* max 4G */
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#define CONFIG_SYS_NONCACHED_MEMORY (1 << 20) /* 1M */
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/* env used only in U-Boot */
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#ifndef CONFIG_SPL_BUILD
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/* usb mass storage */
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#define CONFIG_ROCKUSB_G_DNL_PID 0x350e
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/*
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* DDR layout mainly follow rk3588 Soc
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*/
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#define ENV_MEM_LAYOUT_SETTINGS \
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"scriptaddr=0x40500000\0" \
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"pxefile_addr_r=0x40600000\0" \
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"fdt_addr_r=0x48300000\0" \
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"kernel_addr_r=0x40400000\0" \
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"kernel_addr_c=0x45480000\0" \
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"ramdisk_addr_r=0x4a200000\0"
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#include <config_distro_bootcmd.h>
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#define CONFIG_EXTRA_ENV_SETTINGS \
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ENV_MEM_LAYOUT_SETTINGS \
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"partitions=" PARTS_RKIMG \
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ROCKCHIP_DEVICE_SETTINGS \
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RKIMG_DET_BOOTDEV \
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BOOTENV
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#endif /* !CONFIG_SPL_BUILD */
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/* rockchip ohci host driver */
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#define CONFIG_USB_OHCI_NEW
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#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
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#define CONFIG_PREBOOT
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#define CONFIG_LIB_HW_RAND
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#endif /* __CONFIG_RK3576_COMMON_H */
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