project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
130 lines
3.4 KiB
C
130 lines
3.4 KiB
C
/*
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* Copyright (c) 2015 iComm-semi Ltd.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _SSV_CFG_H_
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#define _SSV_CFG_H_
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/**
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* SSV6030 Hardware Capabilities:
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* HW_CAP_AMPDU_RX
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* HW_CAP_AMPDU_TX
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*/
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#define HW_CAP_AMPDU_RX (0x00000001)
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#define HW_CAP_AMPDU_TX (0x00000002)
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#define HW_CAP_HCI_RX_AGGR (0x00000004)
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#define HW_CAP_HCI_TX_AGGR (0x00000008)
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#define SSV_FIRMWARE_PATH_MAX (256)
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#define SSV_FIRMWARE_NAME_MAX (128)
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/**
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* SSV Module test settings:
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*/
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#define SSV_MOD_TEST_HCI_RX (0x00000001)
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#define SSV_MOD_TEST_HCI_TX (0x00000002)
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#define SSV_MOD_TEST_DELAY_FIXED (0x00000000)
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#define SSV_MOD_TEST_DELAY_RANDOM (0x00000001)
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/**
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* SSV Performance Watch Setting:
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*/
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#define SSV_WATCH_CPU_THROUGHT_TIME_MS 1000
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struct ssv6xxx_cfg {
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u8 maddr[2][6];
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u32 hw_caps; //Hardware Capabilities
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u32 scan_period;
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u8 firmware_path[SSV_FIRMWARE_PATH_MAX];
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u8 firmware_name[SSV_FIRMWARE_NAME_MAX];
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u32 firmware_choice;
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bool hci_trigger_en;
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u32 hci_trigger_qlen;
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u32 hci_idle_period;
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// performance tuning
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bool flowctl;
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u32 flowctl_low_threshold;
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u32 flowctl_high_threshold;
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bool cca;
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bool greentx_en;
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u32 disable_fw_thermal;
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u32 sta_max_reconnect_times;
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#ifdef SSV_MODULE_TEST
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// module test
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u32 mod_test_mask;
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u32 mod_test_delay_mode;
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u32 mod_test_delay_min;
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u32 mod_test_delay_max;
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#endif
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u32 filter_duplicate_rx;
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u32 wmm_follow_vo;
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//for fw reset use
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bool fw_reset;
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u32 fw_status_idle_cnt;
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u32 ignore_firmware_version;
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//for log dbg
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u32 dbg_level;
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u32 dump_fmac_msg_rx;
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// directly ACK control
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bool directly_ack_ctrl;
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u32 xtal_clock;
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int thermal_xtal_offset[5];
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int thermal_wifi_gain_offset[5];
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int thermal_ble_gain_offset[5];
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int thermal_boundary[4];
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u32 ipc_tx_use_one_hwq;
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//for set rts method
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u8 set_rts_method;
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//config ampdu tx lifetime for sw retry
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u32 ampdu_tx_lft;
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u32 txq_credit_boundary;
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// for ble
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u32 ble_replace_scan_interval;
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u32 ble_replace_scan_win;
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u32 ble_dtm;
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//support mifi feature
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u32 mifi_feature;
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u32 mifi_no_traffic_duration;
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// for bandwidth HT20/HT40
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bool use_2040;
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bool use_ep0_rw_reg;
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//custom regdom-channel bitwise
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u32 channel_list_2p4g;
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// for he on/off
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bool he_on;
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// mac address rule
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u32 mac_low_mask;
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u32 mac_high_mask;
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};
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#endif /* _SSV_CFG_H_ */
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