8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
100 lines
2.3 KiB
C
100 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd
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*/
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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static DEFINE_SPINLOCK(clk_out_lock);
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static int rockchip_clk_out_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *node = pdev->dev.of_node;
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struct clk_hw *hw;
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struct resource *res;
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const char *clk_name = node->name;
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const char *parent_name;
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void __iomem *reg;
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u32 shift = 0;
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u8 clk_gate_flags = CLK_GATE_HIWORD_MASK;
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int ret;
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ret = device_property_read_string(dev, "clock-output-names", &clk_name);
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if (ret)
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return ret;
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ret = device_property_read_u32(dev, "rockchip,bit-shift", &shift);
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if (ret)
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return ret;
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if (device_property_read_bool(dev, "rockchip,bit-set-to-disable"))
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clk_gate_flags |= CLK_GATE_SET_TO_DISABLE;
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ret = of_clk_parent_fill(node, &parent_name, 1);
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if (ret != 1)
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return -EINVAL;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENOMEM;
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reg = devm_ioremap(dev, res->start, resource_size(res));
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if (!reg)
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return -ENOMEM;
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pm_runtime_enable(dev);
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hw = clk_hw_register_gate(dev, clk_name, parent_name, CLK_SET_RATE_PARENT,
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reg, shift, clk_gate_flags, &clk_out_lock);
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if (IS_ERR(hw)) {
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ret = -EINVAL;
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goto err_disable_pm_runtime;
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}
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of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
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return 0;
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err_disable_pm_runtime:
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pm_runtime_disable(dev);
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return ret;
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}
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static int rockchip_clk_out_remove(struct platform_device *pdev)
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{
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struct device_node *node = pdev->dev.of_node;
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of_clk_del_provider(node);
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pm_runtime_disable(&pdev->dev);
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return 0;
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}
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static const struct of_device_id rockchip_clk_out_match[] = {
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{ .compatible = "rockchip,clk-out", },
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{},
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};
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static struct platform_driver rockchip_clk_out_driver = {
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.driver = {
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.name = "rockchip-clk-out",
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.of_match_table = rockchip_clk_out_match,
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},
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.probe = rockchip_clk_out_probe,
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.remove = rockchip_clk_out_remove,
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};
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module_platform_driver(rockchip_clk_out_driver);
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MODULE_DESCRIPTION("Rockchip Clock Input-Output-Switch");
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MODULE_AUTHOR("Sugar Zhang <sugar.zhang@rock-chips.com>");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(of, rockchip_clk_out_match);
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