8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
61 lines
1.4 KiB
C
61 lines
1.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*/
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#ifndef RKPM_URAT_H
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#define RKPM_URAT_H
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#include "rkpm_helpers.h"
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/* UART16550 Registers */
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#define UARTTX 0x0
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#define UARTRX 0x0
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#define UARTDLL 0x0
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#define UARTIER 0x4
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#define UARTDLLM 0x4
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#define UARTIIR 0x8
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#define UARTFCR 0x8
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#define UARTLCR 0xc
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#define UARTMCR 0x10
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#define UARTLSR 0x14
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#define UARTMSR 0x18
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#define UARTSPR 0x1c
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#define UARTCSR 0x20
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#define UARTUSR 0x7c
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#define UARTSRR 0x88
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#define UART_MCR_LOOP BIT(4)
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#define UART_RESET BIT(0)
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#define RCVR_FIFO_RESET BIT(1)
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#define XMIT_FIFO_RESET BIT(2)
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/* UART_USR bits */
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#define UARTUSR_BUSY BIT(0)
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#define UARTUSR_TFIFO_N_FULL BIT(1)
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#define UARTUSR_TFIFO_EMPTY BIT(2)
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#define UARTUSR_RRIFO_N_EMPTY BIT(3)
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#define UARTUSR_RFIFO_FULL BIT(4)
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#define UARTFCR_FIFOEN (1 << 0) /* Enable the Tx/Rx FIFO */
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#define UARTLCR_DLAB (1 << 7) /* Divisor Latch Access */
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struct uart_debug_ctx {
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u32 uart_dll;
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u32 uart_dlh;
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u32 uart_ier;
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u32 uart_fcr;
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u32 uart_mcr;
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u32 uart_lcr;
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};
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void rkpm_uart_debug_init(void __iomem *base,
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unsigned int uart_clk,
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unsigned int baud_rate);
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void rkpm_uart_debug_save(void __iomem *base,
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struct uart_debug_ctx *ctx);
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void rkpm_uart_debug_restore(void __iomem *base,
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struct uart_debug_ctx *ctx);
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#endif
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