8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
138 lines
3.6 KiB
YAML
138 lines
3.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
# Copyright (c) 2020 MediaTek Inc.
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: SMI (Smart Multimedia Interface) Common
|
|
|
|
maintainers:
|
|
- Yong Wu <yong.wu@mediatek.com>
|
|
|
|
description: |
|
|
The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
|
|
|
|
MediaTek SMI have two generations of HW architecture, here is the list
|
|
which generation the SoCs use:
|
|
generation 1: mt2701 and mt7623.
|
|
generation 2: mt2712, mt6779, mt8167, mt8173 and mt8183.
|
|
|
|
There's slight differences between the two SMI, for generation 2, the
|
|
register which control the iommu port is at each larb's register base. But
|
|
for generation 1, the register is at smi ao base(smi always on register
|
|
base). Besides that, the smi async clock should be prepared and enabled for
|
|
SMI generation 1 to transform the smi clock into emi clock domain, but that is
|
|
not needed for SMI generation 2.
|
|
|
|
properties:
|
|
compatible:
|
|
oneOf:
|
|
- enum:
|
|
- mediatek,mt2701-smi-common
|
|
- mediatek,mt2712-smi-common
|
|
- mediatek,mt6779-smi-common
|
|
- mediatek,mt8167-smi-common
|
|
- mediatek,mt8173-smi-common
|
|
- mediatek,mt8183-smi-common
|
|
|
|
- description: for mt7623
|
|
items:
|
|
- const: mediatek,mt7623-smi-common
|
|
- const: mediatek,mt2701-smi-common
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
power-domains:
|
|
maxItems: 1
|
|
|
|
clocks:
|
|
description: |
|
|
apb and smi are mandatory. the async is only for generation 1 smi HW.
|
|
gals(global async local sync) also is optional, see below.
|
|
minItems: 2
|
|
maxItems: 4
|
|
items:
|
|
- description: apb is Advanced Peripheral Bus clock, It's the clock for
|
|
setting the register.
|
|
- description: smi is the clock for transfer data and command.
|
|
- description: async is asynchronous clock, it help transform the smi
|
|
clock into the emi clock domain.
|
|
- description: gals0 is the path0 clock of gals.
|
|
- description: gals1 is the path1 clock of gals.
|
|
|
|
clock-names:
|
|
minItems: 2
|
|
maxItems: 4
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- power-domains
|
|
- clocks
|
|
- clock-names
|
|
|
|
allOf:
|
|
- if: # only for gen1 HW
|
|
properties:
|
|
compatible:
|
|
contains:
|
|
enum:
|
|
- mediatek,mt2701-smi-common
|
|
then:
|
|
properties:
|
|
clocks:
|
|
minItems: 3
|
|
maxItems: 3
|
|
clock-names:
|
|
items:
|
|
- const: apb
|
|
- const: smi
|
|
- const: async
|
|
|
|
- if: # for gen2 HW that have gals
|
|
properties:
|
|
compatible:
|
|
enum:
|
|
- mediatek,mt6779-smi-common
|
|
- mediatek,mt8183-smi-common
|
|
|
|
then:
|
|
properties:
|
|
clocks:
|
|
minItems: 4
|
|
maxItems: 4
|
|
clock-names:
|
|
items:
|
|
- const: apb
|
|
- const: smi
|
|
- const: gals0
|
|
- const: gals1
|
|
|
|
else: # for gen2 HW that don't have gals
|
|
properties:
|
|
clocks:
|
|
minItems: 2
|
|
maxItems: 2
|
|
clock-names:
|
|
items:
|
|
- const: apb
|
|
- const: smi
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |+
|
|
#include <dt-bindings/clock/mt8173-clk.h>
|
|
#include <dt-bindings/power/mt8173-power.h>
|
|
|
|
smi_common: smi@14022000 {
|
|
compatible = "mediatek,mt8173-smi-common";
|
|
reg = <0x14022000 0x1000>;
|
|
power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
|
|
clocks = <&mmsys CLK_MM_SMI_COMMON>,
|
|
<&mmsys CLK_MM_SMI_COMMON>;
|
|
clock-names = "apb", "smi";
|
|
};
|