project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
78 lines
1.8 KiB
C
78 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Device Tree support for Rockchip SoCs
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*
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* Copyright (c) 2013 MundoReader S.L.
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* Author: Heiko Stuebner <heiko@sntech.de>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/of_clk.h>
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#include <linux/of_platform.h>
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#include <linux/irqchip.h>
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#include <linux/clocksource.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "core.h"
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#include "pm.h"
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#define RK3288_TIMER6_7_PHYS 0xff810000
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static void __init rockchip_timer_init(void)
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{
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if (of_machine_is_compatible("rockchip,rk3288")) {
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void __iomem *reg_base;
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/*
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* Most/all uboot versions for rk3288 don't enable timer7
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* which is needed for the architected timer to work.
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* So make sure it is running during early boot.
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*/
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reg_base = ioremap(RK3288_TIMER6_7_PHYS, SZ_16K);
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if (reg_base) {
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writel(0, reg_base + 0x30);
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writel(0xffffffff, reg_base + 0x20);
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writel(0xffffffff, reg_base + 0x24);
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writel(1, reg_base + 0x30);
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dsb();
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iounmap(reg_base);
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} else {
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pr_err("rockchip: could not map timer7 registers\n");
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}
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}
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of_clk_init(NULL);
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timer_probe();
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}
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static void __init rockchip_dt_init(void)
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{
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rockchip_suspend_init();
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}
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static const char * const rockchip_board_dt_compat[] = {
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"rockchip,rk2928",
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"rockchip,rk3066a",
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"rockchip,rk3066b",
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"rockchip,rk3188",
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"rockchip,rk3228",
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"rockchip,rk3288",
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"rockchip,rv1103",
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"rockchip,rv1106",
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"rockchip,rv1108",
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NULL,
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};
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DT_MACHINE_START(ROCKCHIP_DT, "Rockchip (Device Tree)")
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.l2c_aux_val = 0,
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.l2c_aux_mask = ~0,
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.init_time = rockchip_timer_init,
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.dt_compat = rockchip_board_dt_compat,
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.init_machine = rockchip_dt_init,
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MACHINE_END
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