122 lines
4.7 KiB
C
122 lines
4.7 KiB
C
/*
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* Copyright (c) 2015 iComm-semi Ltd.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _SSV_REG_ACC_H_
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#define _SSV_REG_ACC_H_
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/**
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* Macros for ssv6200 register read/write access on Linux platform.
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* @ SMAC_REG_WRITE() : write 4-byte value into hardware register.
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* @ SMAC_REG_READ() : read 4-byte value from hardware register.
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* @ SMAC_REG_SET_BITS: set the specified bits to a value.
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* @ SMAC_REG_CONFIRM:
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*
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*/
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#define SMAC_REG_WRITE(_s, _r, _v) \
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({ \
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_s->hci.hci_ops->hci_write_word(_s->hci.hci_ctrl, _r,_v); \
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})
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#define SMAC_REG_READ(_s, _r, _v) \
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({ \
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_s->hci.hci_ops->hci_read_word(_s->hci.hci_ctrl, _r, _v); \
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})
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#ifdef CONFIG_USB_EP0_RW_REGISTER
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#define SMAC_REG_MCU_WRITE(_s, _r, _v) \
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({ \
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typeof(_s) __s = _s; \
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__s->hci.hci_ops->hci_mcu_write_word(__s->hci.hci_ctrl, _r,_v); \
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})
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#define SMAC_REG_MCU_READ(_s, _r, _v) \
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({ \
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typeof(_s) __s = _s; \
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__s->hci.hci_ops->hci_mcu_read_word(__s->hci.hci_ctrl, _r, _v); \
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})
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#endif
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#ifndef __x86_64
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#define SMAC_RF_REG_READ(_s, _r, _v) SMAC_REG_READ(_s, _r, _v)
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#else
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#define SMAC_RF_REG_READ(_s, _r, _v) \
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({ \
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_s->hci.hci_ops->hci_read_word(_s->hci.hci_ctrl, _r, _v); \
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_s->hci.hci_ops->hci_read_word(_s->hci.hci_ctrl, _r, _v); \
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})
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#endif
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#define SMAC_BURST_REG_READ(_s, _r, _v, _n) \
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({ \
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_s->hci.hci_ops->hci_burst_read_word(_s->hci.hci_ctrl, _r, _v, _n); \
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})
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#define SMAC_BURST_REG_WRITE(_s, _r, _v, _n) \
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({ \
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_s->hci.hci_ops->hci_burst_write_word(_s->hci.hci_ctrl, _r, _v, _n); \
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})
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#define SMAC_LOAD_FW(_s,_addr, _data, _size) \
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({ \
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_s->hci.hci_ops->hci_load_fw(_s->hci.hci_ctrl,_addr, _data, _size); \
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})
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#define SMAC_IFC_RESET(_s) \
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({ \
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_s->hci.hci_ops->hci_interface_reset(_s->hci.hci_ctrl); \
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})
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#define SMAC_SYSPLF_RESET(_s, _r, _v) \
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({ \
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_s->hci.hci_ops->hci_sysplf_reset(_s->hci.hci_ctrl, _r, _v); \
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})
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#define SMAC_REG_CONFIRM(_s, _r, _v) \
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{ \
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u32 _regval; \
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SMAC_REG_READ(_s, _r, &_regval); \
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if (_regval != (_v)) { \
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printk("ERROR!!Please check interface!\n"); \
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printk("[0x%08x]: 0x%08x!=0x%08x\n", \
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(_r), (_v), _regval); \
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printk("SOS!SOS!\n"); \
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return -1; \
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} \
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}
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#define SMAC_REG_SET_BITS(_sh, _reg, _set, _clr) \
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({ \
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int ret; \
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u32 _regval; \
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ret = SMAC_REG_READ(_sh, _reg, &_regval); \
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_regval &= ~(_clr); \
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_regval |= (_set); \
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if (ret == 0) \
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ret = SMAC_REG_WRITE(_sh, _reg, _regval); \
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ret; \
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})
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#ifndef __x86_64
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#define SMAC_RF_REG_SET_BITS(_sh, _reg, _set, _clr) SMAC_REG_SET_BITS(_sh, _reg, _set, _clr)
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#else
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#define SMAC_RF_REG_SET_BITS(_sh, _reg, _set, _clr) \
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({ \
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int ret; \
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u32 _regval; \
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ret = SMAC_REG_READ(_sh, _reg, &_regval); \
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ret = SMAC_REG_READ(_sh, _reg, &_regval); \
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_regval &= ~(_clr); \
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_regval |= (_set); \
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if (ret == 0) \
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ret = SMAC_REG_WRITE(_sh, _reg, _regval); \
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ret; \
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})
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#endif
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#endif // _SSV_REG_ACC_H_
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