8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
252 lines
6.4 KiB
ArmAsm
252 lines
6.4 KiB
ArmAsm
/*
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* Copyright © 2011 Siarhei Siamashka <siarhei.siamashka@gmail.com>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#if defined(__i386__) || defined(__amd64__)
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.intel_syntax noprefix
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.text
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#define PREFETCH_DISTANCE 256
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.macro asm_function_helper function_name
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.global \function_name
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.func \function_name
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\function_name:
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#ifdef __amd64__
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#ifdef _WIN64
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.set DST, rcx
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.set SRC, rdx
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.set SIZE, r8
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#else
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.set DST, rdi
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.set SRC, rsi
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.set SIZE, rdx
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#endif
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#else
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mov eax, [esp + 4]
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mov ecx, [esp + 8]
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mov edx, [esp + 12]
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.set DST, eax
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.set SRC, ecx
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.set SIZE, edx
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#endif
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.endm
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.macro asm_function function_name
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#if defined(_WIN32) && !defined(_WIN64)
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asm_function_helper _\function_name
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#else
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asm_function_helper \function_name
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#endif
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.endm
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.macro push3 a, b, c
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push \a
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push \b
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push \c
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.endm
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.macro pop3 a, b, c
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pop \c
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pop \b
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pop \a
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.endm
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/*****************************************************************************/
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asm_function aligned_block_copy_movsb
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0:
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#ifdef __amd64__
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push3 rdi rsi rcx
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push3 DST SRC SIZE
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pop3 rdi rsi rcx
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rep movsb
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pop3 rdi rsi rcx
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#else
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push3 edi esi ecx
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push3 DST SRC SIZE
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pop3 edi esi ecx
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rep movsb
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pop3 edi esi ecx
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#endif
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ret
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.endfunc
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asm_function aligned_block_copy_movsd
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0:
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#ifdef __amd64__
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push3 rdi rsi rcx
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push3 DST SRC SIZE
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pop3 rdi rsi rcx
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sar rcx, 2
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rep movsd
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pop3 rdi rsi rcx
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#else
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push3 edi esi ecx
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push3 DST SRC SIZE
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pop3 edi esi ecx
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sar ecx, 2
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rep movsd
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pop3 edi esi ecx
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#endif
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ret
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.endfunc
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asm_function aligned_block_copy_sse2
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0:
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movdqa xmm0, [SRC + 0]
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movdqa xmm1, [SRC + 16]
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movdqa xmm2, [SRC + 32]
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movdqa xmm3, [SRC + 48]
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movdqa [DST + 0], xmm0
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movdqa [DST + 16], xmm1
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movdqa [DST + 32], xmm2
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movdqa [DST + 48], xmm3
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add SRC, 64
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add DST, 64
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sub SIZE, 64
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jg 0b
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ret
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.endfunc
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asm_function aligned_block_copy_nt_sse2
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0:
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movdqa xmm0, [SRC + 0]
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movdqa xmm1, [SRC + 16]
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movdqa xmm2, [SRC + 32]
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movdqa xmm3, [SRC + 48]
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movntdq [DST + 0], xmm0
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movntdq [DST + 16], xmm1
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movntdq [DST + 32], xmm2
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movntdq [DST + 48], xmm3
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add SRC, 64
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add DST, 64
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sub SIZE, 64
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jg 0b
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ret
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.endfunc
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asm_function aligned_block_copy_pf32_sse2
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0:
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prefetchnta [SRC + PREFETCH_DISTANCE]
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prefetchnta [SRC + PREFETCH_DISTANCE + 32]
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movdqa xmm0, [SRC + 0]
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movdqa xmm1, [SRC + 16]
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movdqa xmm2, [SRC + 32]
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movdqa xmm3, [SRC + 48]
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movdqa [DST + 0], xmm0
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movdqa [DST + 16], xmm1
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movdqa [DST + 32], xmm2
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movdqa [DST + 48], xmm3
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add SRC, 64
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add DST, 64
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sub SIZE, 64
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jg 0b
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ret
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.endfunc
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asm_function aligned_block_copy_nt_pf32_sse2
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0:
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prefetchnta [SRC + PREFETCH_DISTANCE]
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prefetchnta [SRC + PREFETCH_DISTANCE + 32]
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movdqa xmm0, [SRC + 0]
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movdqa xmm1, [SRC + 16]
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movdqa xmm2, [SRC + 32]
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movdqa xmm3, [SRC + 48]
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movntdq [DST + 0], xmm0
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movntdq [DST + 16], xmm1
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movntdq [DST + 32], xmm2
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movntdq [DST + 48], xmm3
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add SRC, 64
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add DST, 64
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sub SIZE, 64
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jg 0b
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ret
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.endfunc
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asm_function aligned_block_copy_pf64_sse2
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0:
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prefetchnta [SRC + PREFETCH_DISTANCE]
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movdqa xmm0, [SRC + 0]
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movdqa xmm1, [SRC + 16]
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movdqa xmm2, [SRC + 32]
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movdqa xmm3, [SRC + 48]
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movdqa [DST + 0], xmm0
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movdqa [DST + 16], xmm1
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movdqa [DST + 32], xmm2
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movdqa [DST + 48], xmm3
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add SRC, 64
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add DST, 64
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sub SIZE, 64
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jg 0b
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ret
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.endfunc
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asm_function aligned_block_copy_nt_pf64_sse2
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0:
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prefetchnta [SRC + PREFETCH_DISTANCE]
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movdqa xmm0, [SRC + 0]
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movdqa xmm1, [SRC + 16]
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movdqa xmm2, [SRC + 32]
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movdqa xmm3, [SRC + 48]
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movntdq [DST + 0], xmm0
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movntdq [DST + 16], xmm1
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movntdq [DST + 32], xmm2
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movntdq [DST + 48], xmm3
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add SRC, 64
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add DST, 64
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sub SIZE, 64
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jg 0b
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ret
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.endfunc
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asm_function aligned_block_fill_sse2
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movdqa xmm0, [SRC + 0]
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0:
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movdqa [DST + 0], xmm0
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movdqa [DST + 16], xmm0
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movdqa [DST + 32], xmm0
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movdqa [DST + 48], xmm0
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add DST, 64
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sub SIZE, 64
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jg 0b
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ret
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.endfunc
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asm_function aligned_block_fill_nt_sse2
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movdqa xmm0, [SRC + 0]
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0:
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movntdq [DST + 0], xmm0
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movntdq [DST + 16], xmm0
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movntdq [DST + 32], xmm0
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movntdq [DST + 48], xmm0
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add DST, 64
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sub SIZE, 64
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jg 0b
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ret
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.endfunc
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/*****************************************************************************/
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#endif
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