luckfox-pico-sdk/sysdrv/source/kernel/drivers/usb/renesas_usbhs/rza.c
luckfox-eng29 8f34c2760d project:build.sh: Added fastboot support; custom modifications to U-Boot and kernel implemented using patches.
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between
the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door
for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more
usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp:
Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for
compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem.
sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device
tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately.
sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick
boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades.
sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for
fastboot.

Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
2024-10-14 09:47:04 +08:00

57 lines
1.5 KiB
C

// SPDX-License-Identifier: GPL-2.0
/*
* Renesas USB driver RZ/A initialization and power control
*
* Copyright (C) 2018 Chris Brandt
* Copyright (C) 2018-2019 Renesas Electronics Corporation
*/
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/of_device.h>
#include "common.h"
#include "rza.h"
static int usbhs_rza1_hardware_init(struct platform_device *pdev)
{
struct usbhs_priv *priv = usbhs_pdev_to_priv(pdev);
struct device_node *usb_x1_clk, *extal_clk;
u32 freq_usb = 0, freq_extal = 0;
/* Input Clock Selection (NOTE: ch0 controls both ch0 and ch1) */
usb_x1_clk = of_find_node_by_name(NULL, "usb_x1");
extal_clk = of_find_node_by_name(NULL, "extal");
of_property_read_u32(usb_x1_clk, "clock-frequency", &freq_usb);
of_property_read_u32(extal_clk, "clock-frequency", &freq_extal);
of_node_put(usb_x1_clk);
of_node_put(extal_clk);
if (freq_usb == 0) {
if (freq_extal == 12000000) {
/* Select 12MHz XTAL */
usbhs_bset(priv, SYSCFG, UCKSEL, UCKSEL);
} else {
dev_err(usbhs_priv_to_dev(priv), "A 48MHz USB clock or 12MHz main clock is required.\n");
return -EIO;
}
}
/* Enable USB PLL (NOTE: ch0 controls both ch0 and ch1) */
usbhs_bset(priv, SYSCFG, UPLLE, UPLLE);
usleep_range(1000, 2000);
usbhs_bset(priv, SUSPMODE, SUSPM, SUSPM);
return 0;
}
const struct renesas_usbhs_platform_info usbhs_rza1_plat_info = {
.platform_callback = {
.hardware_init = usbhs_rza1_hardware_init,
.get_id = usbhs_get_id_as_gadget,
},
.driver_param = {
.has_new_pipe_configs = 1,
},
};