project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
305 lines
9.5 KiB
C
305 lines
9.5 KiB
C
/*
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* Copyright (c) 2021 iComm-semi Ltd.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Common defines and declarations for host driver and firmware for all
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* platforms.
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*/
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#ifndef __FMAC_RX_H__
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#define __FMAC_RX_H__
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#include <linux/mutex.h>
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/*******************************************************************************
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* Include Files
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******************************************************************************/
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/*******************************************************************************
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* Defines
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******************************************************************************/
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/*
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* Decryption status subfields.
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* {
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*/
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#define SSV_RX_HD_DECR_UNENC (0) // Frame unencrypted
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#define SSV_RX_HD_DECR_ICVFAIL (1) // WEP/TKIP ICV failure
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#define SSV_RX_HD_DECR_CCMPFAIL (2) // CCMP failure
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#define SSV_RX_HD_DECR_AMSDUDISCARD (3) // A-MSDU discarded at HW
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#define SSV_RX_HD_DECR_NULLKEY (4) // NULL key found
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#define SSV_RX_HD_DECR_WEPSUCCESS (5) // Security type WEP
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#define SSV_RX_HD_DECR_TKIPSUCCESS (6) // Security type TKIP
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#define SSV_RX_HD_DECR_CCMPSUCCESS (7) // Security type CCMP
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#define SSV_FC_GET_TYPE(fc) (((fc) & 0x000c) >> 2)
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#define SSV_FC_GET_STYPE(fc) (((fc) & 0x00f0) >> 4)
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#define AGG_REORD_MSG_MAX_NUM (4096)
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/*******************************************************************************
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* Enumerations
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******************************************************************************/
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enum rx_status_bits
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{
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/// The buffer can be forwarded to the networking stack
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RX_STAT_FORWARD = 1 << 0,
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/// A new buffer has to be allocated
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RX_STAT_ALLOC = 1 << 1,
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/// The buffer has to be deleted
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RX_STAT_DELETE = 1 << 2,
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/// The length of the buffer has to be updated
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RX_STAT_LEN_UPDATE = 1 << 3,
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/// The length in the Ethernet header has to be updated
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RX_STAT_ETH_LEN_UPDATE = 1 << 4,
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/// Simple copy
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RX_STAT_COPY = 1 << 5,
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};
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/*******************************************************************************
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* Structures
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******************************************************************************/
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struct hw_vect {
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/** Total length for the MPDU transfer */
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u32 len :16;
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u32 reserved : 8;
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/** AMPDU Status Information */
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u32 mpdu_cnt : 6;
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u32 ampdu_cnt : 2;
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/** TSF Low */
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__le32 tsf_lo;
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/** TSF High */
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__le32 tsf_hi;
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/** Receive Vector 1a */
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u32 leg_length :12;
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u32 leg_rate : 4;
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u32 ht_length :16;
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/** Receive Vector 1b */
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u32 _ht_length : 4; // FIXME
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u32 short_gi : 1;
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u32 stbc : 2;
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u32 smoothing : 1;
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u32 mcs : 7;
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u32 pre_type : 1;
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u32 format_mod : 3;
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u32 ch_bw : 2;
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u32 n_sts : 3;
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u32 lsig_valid : 1;
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u32 sounding : 1;
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u32 num_extn_ss : 2;
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u32 aggregation : 1;
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u32 fec_coding : 1;
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u32 dyn_bw : 1;
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u32 doze_not_allowed : 1;
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/** Receive Vector 1c */
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u32 antenna_set : 8;
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u32 partial_aid : 9;
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u32 group_id : 6;
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u32 reserved_1c : 1;
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s32 rssi1 : 8;
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/** Receive Vector 1d */
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s32 rssi2 : 8;
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s32 rssi3 : 8;
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s32 rssi4 : 8;
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u32 reserved_1d : 8;
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/** Receive Vector 2a */
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u32 rcpi : 8;
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u32 evm1 : 8;
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u32 evm2 : 8;
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u32 evm3 : 8;
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/** Receive Vector 2b */
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u32 evm4 : 8;
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u32 reserved2b_1 : 8;
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u32 reserved2b_2 : 8;
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u32 reserved2b_3 : 8;
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/** Status **/
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u32 rx_vect2_valid : 1;
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u32 resp_frame : 1;
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/** Decryption Status */
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u32 decr_status : 3;
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u32 rx_fifo_oflow : 1;
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/** Frame Unsuccessful */
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u32 undef_err : 1;
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u32 phy_err : 1;
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u32 fcs_err : 1;
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u32 addr_mismatch : 1;
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u32 ga_frame : 1;
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u32 current_ac : 2;
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u32 frm_successful_rx : 1;
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/** Descriptor Done */
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u32 desc_done_rx : 1;
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/** Key Storage RAM Index */
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u32 key_sram_index : 10;
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/** Key Storage RAM Index Valid */
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u32 key_sram_v : 1;
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u32 type : 2;
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u32 subtype : 4;
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};
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struct hw_rxhdr {
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/** RX vector */
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struct hw_vect hwvect;
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/** PHY channel information 1 */
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u32 phy_band : 8;
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u32 phy_channel_type : 8;
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u32 phy_prim20_freq : 16;
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/** PHY channel information 2 */
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u32 phy_center1_freq : 16;
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u32 phy_center2_freq : 16;
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/** RX flags */
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u32 flags_is_amsdu : 1;
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u32 flags_is_80211_mpdu: 1;
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u32 flags_is_4addr : 1;
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u32 flags_new_peer : 1;
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u32 flags_user_prio : 3;
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u32 flags_rsvd0 : 1;
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u32 flags_vif_idx : 8; // 0xFF if invalid VIF index
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u32 flags_sta_idx : 8; // 0xFF if invalid STA index
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u32 flags_dst_idx : 8; // 0xFF if unknown destination STA
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u16 sn;
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u16 tid;
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}__packed;
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struct ssv_agg_reodr_msg {
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u16 sn;
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u8 sta_idx;
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u8 tid;
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u8 status;
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u8 num;
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}__packed;
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/// 802.11 Sequence Control definition
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#define MAC_SEQCTRL_NUM_OFT 4
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#define MAC_SEQCTRL_NUM_MSK 0xFFF0
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#define MAC_SEQCTRL_NUM_MAX (MAC_SEQCTRL_NUM_MSK >> MAC_SEQCTRL_NUM_OFT)
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#define RX_CNTRL_REORD_WIN_SIZE 16
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#define RX_HOST_REORD_PATTERN 0xFEFADECA
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/// Structure containing the information about RX reordering if host handle reordering
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struct host_reorder_info
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{
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uint32_t upattern;
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uint8_t frame_info;
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uint8_t sta_idx;
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uint8_t tid;
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uint8_t baw_size;
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uint64_t pn;
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uint16_t win_start;
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uint16_t sn;
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uint32_t cookie;
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};
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/// Bit field positions for frame_info value (struct rxu_cntrl_rx_status)
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enum rxu_cntrl_frame_info_pos
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{
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#define CO_BIT(pos) (1U<<(pos))
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/// Received frame was encrypted using TKIP method, so a MIC check is required
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RXU_CNTRL_MIC_CHECK_NEEDED = CO_BIT(0),
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/// Received frame has to pass the PN replay check
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RXU_CNTRL_PN_CHECK_NEEDED = CO_BIT(1),
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/// Received frame is a Mesh Beacon received from an unknown Mesh STA
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RXU_CNTRL_NEW_MESH_PEER = CO_BIT(2),
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/// Received frame was group addressed
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RXU_CNTRL_GROUP_ADDRESSED = CO_BIT(3),
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/// Received BAR frame was delivered to host
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RXU_CNTRL_BAR_TO_HOST = CO_BIT(6),
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/// Received no rx BA frame
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RXU_CNTRL_NO_RX_BA_TO_HOST = CO_BIT(7),
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};
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/// Structure describing an element of the RX reordering table
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struct rxu_cntrl_reord_elt
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{
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/// Packet number of the received packet (used for replay check)
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uint64_t pn;
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/// Host Buffer Address
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struct sk_buff *skb;
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/// flag indicating if the PN must be verified
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bool pn_check;
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};
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struct rxu_cntrl_reord
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{
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uint32_t sn_rx_time;
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/**
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* Lowest expected to be received (from 0 to 4096)
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* = WinStartB IEEE Std 802.11-2012 section 9.21.7.6.1
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*/
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uint64_t pn;
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uint16_t win_start;
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uint16_t first_win_start;
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uint16_t win_end;
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/// Current position in the RX packet status array
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uint8_t rx_status_pos;
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/// Number of packet received out of order and waiting for next sn
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uint8_t ooo_pkt_cnt;
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/// TID of the reordering structure
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uint8_t tid;
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/// Reordering buffer elements
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struct rxu_cntrl_reord_elt elt[RX_CNTRL_REORD_WIN_SIZE];
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/// Flag indicating if the reordering agreement is active or not
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bool active;
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bool upload;
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};
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/// STA Info Table
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struct reord_info_tag
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{
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/// For RX BA agreements per TID
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struct rxu_cntrl_reord ba_agmts_rx[TID_MAX];
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bool connect;
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struct mutex data_mutex;
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uint8_t lock_en;
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uint8_t level;
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};
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/*******************************************************************************
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* Variables
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******************************************************************************/
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extern const u8 legrates_lut[];
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/*******************************************************************************
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* Functions
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******************************************************************************/
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int ssv_rx_packet_ind(void *app_param, struct sk_buff *skb);
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void ssv_rxreord_timeout_cb(struct ssv_softc *sc);
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void ssv_rxreord_create(struct ssv_softc *sc, u8 sta_idx);
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void ssv_rxreord_delete(struct ssv_softc *sc, u8 sta_idx);
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void ssv_rxreord_all_dump(struct ssv_softc *sc, uint16_t sta_idx);
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int ssv_push_private_msg_to_host(struct ssv_softc *sc, u32 msgid, u8 *data, u32 datalen);
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#endif /* __FMAC_RX_H__ */
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