8f34c2760d
project:cfg:BoardConfig_IPC: Added fastboot BoardConfig file and firmware post-scripts, distinguishing between the BoardConfigs for Luckfox Pico Pro and Luckfox Pico Max. project:app: Added fastboot_client and rk_smart_door for quick boot applications; updated rkipc app to adapt to the latest media library. media:samples: Added more usage examples. media:rockit: Fixed bugs; removed support for retrieving data frames from VPSS. media:isp: Updated rkaiq library and related tools to support connection to RKISP_Tuner. sysdrv:Makefile: Added support for compiling drv_ko on Luckfox Pico Ultra W using Ubuntu; added support for custom root filesystem. sysdrv:tools:board: Updated Buildroot optional mirror sources, updated some software versions, and stored device tree files and configuration files that undergo multiple modifications for U-Boot and kernel separately. sysdrv:source:mcu: Used RISC-V MCU SDK with RT-Thread system, mainly for initializing camera AE during quick boot. sysdrv:source:uboot: Added support for fastboot; added high baud rate DDR bin for serial firmware upgrades. sysdrv:source:kernel: Upgraded to version 5.10.160; increased NPU frequency for RV1106G3; added support for fastboot. Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
130 lines
2.1 KiB
Plaintext
Executable File
130 lines
2.1 KiB
Plaintext
Executable File
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1106.dtsi"
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#include "rv1106-evb.dtsi"
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#include "rv1106-luckfox-pico-pro-max-ipc.dtsi"
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/ {
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model = "Luckfox Pico Max";
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compatible = "rockchip,rv1103g-38x38-ipc-v10", "rockchip,rv1106g3";
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};
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/**********CRU**********/
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&cru {
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assigned-clocks =
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<&cru PLL_GPLL>, <&cru PLL_CPLL>,
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<&cru ARMCLK>,
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<&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
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<&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
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<&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
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<&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
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assigned-clock-rates =
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<1188000000>, <700000000>,
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<1104000000>,
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<400000000>, <200000000>,
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<100000000>, <300000000>,
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<100000000>, <100000000>,
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<200000000>, <700000000>;
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};
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/**********NPU**********/
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&npu {
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assigned-clock-rates = <700000000>;
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};
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/**********FLASH**********/
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&sfc {
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status = "okay";
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flash@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <75000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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/**********SDMMC**********/
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&sdmmc {
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max-frequency = <50000000>;
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no-sdio;
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no-mmc;
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
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status = "okay";
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};
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/**********ETH**********/
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&gmac {
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status = "okay";
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};
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/**********USB**********/
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&u2phy {
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status = "okay";
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};
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&u2phy_otg {
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rockchip,dis-u2-susphy;
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status = "okay";
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};
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&usbdrd {
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status = "okay";
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};
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&usbdrd_dwc3 {
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status = "okay";
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dr_mode = "peripheral";
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};
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/**********SPI**********/
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&spi0 {
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status = "disabled";
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spidev@0 {
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spi-max-frequency = <50000000>;
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};
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fbtft@0 {
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spi-max-frequency = <50000000>;
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};
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};
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/**********I2C**********/
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/* I2C3_M1 */
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&i2c3 {
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status = "disabled";
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clock-frequency = <100000>;
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};
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/* I2C1_M1 */
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&i2c1 {
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status = "disabled";
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clock-frequency = <100000>;
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};
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/**********UART**********/
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/* UART3_M1 */
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&uart3 {
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status = "disabled";
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};
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/* UART4_M1 */
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&uart4 {
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status = "disabled";
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};
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/**********RTC**********/
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&rtc {
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status = "okay";
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};
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