justmarvinn/luckfox-pico-sdk
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

sysdrv:tools:board:kernel:Disable NPU overclocking by default to avoid memory errors caused by prolonged NPU operation.

Browse Source 
Signed-off-by: luckfox-eng29 <eng29@luckfox.com>
This commit is contained in:
luckfox-eng29 2024-11-18 20:55:47 +08:00
parent 30c229c95b
commit 737ec6ffe2
3 changed files with 57 additions and 57 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

38
sysdrv/tools/board/kernel/rv1106g-luckfox-pico-max.dts
View File

@ -15,27 +15,27 @@
}; };
/**********CRU**********/ /**********CRU**********/
&cru { //&cru {
assigned-clocks = // assigned-clocks =
<&cru PLL_GPLL>, <&cru PLL_CPLL>, // <&cru PLL_GPLL>, <&cru PLL_CPLL>,
<&cru ARMCLK>, // <&cru ARMCLK>,
<&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>, // <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
<&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>, // <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
<&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>, // <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
<&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>; // <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
assigned-clock-rates = // assigned-clock-rates =
<1188000000>, <700000000>, // <1188000000>, <700000000>,
<1104000000>, // <1104000000>,
<400000000>, <200000000>, // <400000000>, <200000000>,
<100000000>, <300000000>, // <100000000>, <300000000>,
<100000000>, <100000000>, // <100000000>, <100000000>,
<200000000>, <700000000>; // <200000000>, <700000000>;
}; //};
/**********NPU**********/ /**********NPU**********/
&npu { //&npu {
assigned-clock-rates = <700000000>; // assigned-clock-rates = <700000000>;
}; //};
/**********FLASH**********/ /**********FLASH**********/
&sfc { &sfc {

38
sysdrv/tools/board/kernel/rv1106g-luckfox-pico-ultra-w.dts
View File

@ -36,27 +36,27 @@
}; };
/**********CRU**********/ /**********CRU**********/
&cru { //&cru {
assigned-clocks = // assigned-clocks =
<&cru PLL_GPLL>, <&cru PLL_CPLL>, // <&cru PLL_GPLL>, <&cru PLL_CPLL>,
<&cru ARMCLK>, // <&cru ARMCLK>,
<&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>, // <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
<&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>, // <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
<&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>, // <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
<&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>; // <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
assigned-clock-rates = // assigned-clock-rates =
<1188000000>, <700000000>, // <1188000000>, <700000000>,
<1104000000>, // <1104000000>,
<400000000>, <200000000>, // <400000000>, <200000000>,
<100000000>, <300000000>, // <100000000>, <300000000>,
<100000000>, <100000000>, // <100000000>, <100000000>,
<200000000>, <700000000>; // <200000000>, <700000000>;
}; //};
/**********NPU**********/ /**********NPU**********/
&npu { //&npu {
assigned-clock-rates = <700000000>; // assigned-clock-rates = <700000000>;
}; //};
/**********EMMC**********/ /**********EMMC**********/
&emmc { &emmc {

38
sysdrv/tools/board/kernel/rv1106g-luckfox-pico-ultra.dts
View File

@ -15,27 +15,27 @@
}; };
/**********CRU**********/ /**********CRU**********/
&cru { //&cru {
assigned-clocks = // assigned-clocks =
<&cru PLL_GPLL>, <&cru PLL_CPLL>, // <&cru PLL_GPLL>, <&cru PLL_CPLL>,
<&cru ARMCLK>, // <&cru ARMCLK>,
<&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>, // <&cru ACLK_PERI_ROOT>, <&cru HCLK_PERI_ROOT>,
<&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>, // <&cru PCLK_PERI_ROOT>, <&cru ACLK_BUS_ROOT>,
<&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>, // <&cru PCLK_TOP_ROOT>, <&cru PCLK_PMU_ROOT>,
<&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>; // <&cru HCLK_PMU_ROOT>, <&cru CLK_500M_SRC>;
assigned-clock-rates = // assigned-clock-rates =
<1188000000>, <700000000>, // <1188000000>, <700000000>,
<1104000000>, // <1104000000>,
<400000000>, <200000000>, // <400000000>, <200000000>,
<100000000>, <300000000>, // <100000000>, <300000000>,
<100000000>, <100000000>, // <100000000>, <100000000>,
<200000000>, <700000000>; // <200000000>, <700000000>;
}; //};
/**********NPU**********/ /**********NPU**********/
&npu { //&npu {
assigned-clock-rates = <700000000>; // assigned-clock-rates = <700000000>;
}; //};
/**********EMMC**********/ /**********EMMC**********/
&emmc { &emmc {